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write buf finished
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yhx committed May 18, 2016
1 parent faf2294 commit 7033517
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Showing 4 changed files with 509 additions and 5 deletions.
2 changes: 1 addition & 1 deletion RTL/ll_ccie/afu_core.v
Original file line number Diff line number Diff line change
Expand Up @@ -194,7 +194,7 @@ module afu_core #(MDATA = 14)
// rd_req*, rd_rsp*, wr_req*, and wr_rsp* ports
// - Control information can go in afu_context
//-----------------------------------------------------------
afu_user2 #(
afu_user_wb #(
.ADDR_LMT(ADDR_LMT),
.MDATA (MDATA),
.CACHE_WIDTH (CACHE_WIDTH)
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4 changes: 0 additions & 4 deletions RTL/ll_ccie/afu_user2.v
Original file line number Diff line number Diff line change
Expand Up @@ -90,9 +90,7 @@ module afu_user2 #(ADDR_LMT = 20, MDATA = 14, CACHE_WIDTH = 512)
assign done = r_done;

reg [511:0] vec1;
reg [511:0] vec2;
reg [511:0] mat1;
reg [511:0] mat2;
reg [511:0] res_out;
reg [512:0] res_out_back;
reg [31:0] res;
Expand Down Expand Up @@ -175,9 +173,7 @@ module afu_user2 #(ADDR_LMT = 20, MDATA = 14, CACHE_WIDTH = 512)
res_back = 0;
res = 0;
vec1 = 0;
vec2 = 0;
mat1 = 0;
mat2 = 0;
res_out = 0;
res_out_back = 0;
res = 0;
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