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    12 repositories

    • icePie-workshop-codes

      Public
      Verilog
      •0•0•0•0•Updated Nov 15, 2024Nov 15, 2024

    • icePie-examples

      Public
      Example Implementations for icePie-FPGA-devkit board
      Verilog
      •0•0•0•0•Updated Nov 12, 2024Nov 12, 2024

    • apio

      Public
      🌱 Open source ecosystem for open FPGA boards
      Verilog
      •
      GNU General Public License v2.0
      •140•0•0•0•Updated Nov 12, 2024Nov 12, 2024

    • icestudio

      Public
      ❄️ Visual editor for open FPGA boards
      JavaScript
      •
      GNU General Public License v2.0
      •251•0•0•0•Updated Nov 10, 2023Nov 10, 2023

    • ice40-playground

      Public
      Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)
      Verilog
      •
      Other
      •48•0•0•0•Updated Oct 16, 2023Oct 16, 2023

    • my_hdmi_device

      Public
      New clean hdmi implementation for ulx3s, icestick, icebreaker, icepie, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi standard. Supports DDR and SDR transfer!
      GLSL
      •
      ISC License
      •13•0•0•0•Updated Oct 16, 2023Oct 16, 2023

    • usb_hid_host

      Public
      A compact USB HID host FPGA core supporting keyboards, mice and gamepads.
      Verilog
      •
      Apache License 2.0
      •19•0•0•0•Updated Oct 16, 2023Oct 16, 2023

    • bitsynaptics.github.io

      Public
      BitSynaptics Github IO
      0•0•0•0•Updated Oct 14, 2023Oct 14, 2023

    • icePie-riscv

      Public
      Examples codes demonstrating implementation of RiscV softcores on the icePie FPGA devkit
      0•0•0•0•Updated Aug 5, 2023Aug 5, 2023

    • picorv32

      Public
      PicoRV32 - A Size-Optimized RISC-V CPU
      Verilog
      •
      ISC License
      •769•0•0•0•Updated Aug 5, 2023Aug 5, 2023

    • learn-fpga

      Public
      Learning FPGA, yosys, nextpnr, and RISC-V
      C++
      •
      BSD 3-Clause "New" or "Revised" License
      •250•0•0•0•Updated Aug 5, 2023Aug 5, 2023

    • ghdl-yosys-blink-ice40

      Public
      Blink an LED on an ice40 FPGA in VHDL using ghdl, yosys and nextpnr
      Makefile
      •5•0•0•0•Updated Jun 14, 2020Jun 14, 2020