Other Wally cleanup

openhwgroup · Jun 9, 2023 · 6a0d818 · 6a0d818
1 parent df96900
commit 6a0d818
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Showing 4 changed files with 59 additions and 5 deletions.
diff --git a/Makefile b/Makefile
@@ -4,7 +4,11 @@
 
 all:
 	make install
-	make regression
+	make testfloat	
+	make riscof
+	make verify
+	make coverage
+	make benchmarks
 
 # install copies over the Makefile.include from riscv-isa-sim
 # And corrects the TARGETDIR path and the RISCV_PREFIX
@@ -18,9 +22,37 @@ install:
 	##rm tests/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64/riscvOVPsimPlus.exe
 	##ln -s ${RISCV}/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64/riscvOVPsimPlus.exe tests/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64/riscvOVPsimPlus.exe
 
-regression:
+riscof:
 	make -C sim
 
+testfloat:
+	cd ${WALLY}/addins/SoftFloat-3e/build/Linux-x86_64-GCC; make
+	cd ${WALLY}/addins/TestFloat-3e/build/Linux-x86_64-GCC; make
+	cd ${WALLY}/tests/fp; ./create_all_vectors.sh
+
+verify:
+	cd ${WALLY}/sim; ./regression-wally
+	cd ${WALLY}/sim; ./sim-testfloat-batch all
+	make imperasdv
+
+imperasdv:
+	iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m
+	iter-elf.bash --search ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m
+
+coverage:
+	cd ${WALLY}/sim; ./regresssion-wally -coverage -fp
+
+benchmarks:
+	make coremark
+	make embench
+
+coremark:
+	cd ${WALLY}/benchmarks/coremark; make; make run
+
+embench:
+	cd ${WALLY}/benchmarks/embench; make; make run
+
+
 clean:
 	make clean -C sim
 
diff --git a/benchmarks/coremark/Makefile b/benchmarks/coremark/Makefile
@@ -11,7 +11,11 @@ sources=$(cmbase)/core_main.c $(cmbase)/core_list_join.c $(cmbase)/coremark.h  \
 	$(PORT_DIR)/core_portme.h $(PORT_DIR)/core_portme.c $(PORT_DIR)/core_portme.mak \
 	$(PORT_DIR)/crt.S $(PORT_DIR)/encoding.h $(PORT_DIR)/util.h $(PORT_DIR)/syscalls.c
 ABI := $(if $(findstring "64","$(XLEN)"),lp64,ilp32)
-ARCH := rv$(XLEN)gc
+#ARCH := rv$(XLEN)gc_zba_zbb_zbc_zbs
+#ARCH := rv$(XLEN)gc
+ARCH := rv$(XLEN)imc_zicsr
+#ARCH := rv$(XLEN)im_zicsr
+#ARCH := rv$(XLEN)i_zicsr
 PORT_CFLAGS = -g -mabi=$(ABI) -march=$(ARCH) -static -falign-functions=16 \
 	-mbranch-cost=1 -DSKIP_DEFAULT_MEMSET -mtune=sifive-3-series -O3 -finline-functions -falign-jumps=4 \
 	-fno-delete-null-pointer-checks -fno-rename-registers --param=loop-max-datarefs-for-datadeps=0 \

diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh
@@ -45,7 +45,7 @@ sudo mkdir -p $RISCV
 # Update and Upgrade tools (see https://itsfoss.com/apt-update-vs-upgrade/)
 sudo apt update -y
 sudo apt upgrade -y
-sudo apt install -y git gawk make texinfo bison flex build-essential python3 libz-dev libexpat-dev autoconf device-tree-compiler ninja-build libpixman-1-dev ncurses-base ncurses-bin libncurses5-dev dialog curl wget ftp libgmp-dev libglib2.0-dev python3-pip pkg-config opam z3 zlib1g-dev verilator automake autotools-dev libmpc-dev libmpfr-dev  gperf libtool patchutils bc 
+sudo apt install -y git gawk make texinfo bison flex build-essential python3 libz-dev libexpat-dev autoconf device-tree-compiler ninja-build libpixman-1-dev ncurses-base ncurses-bin libncurses5-dev dialog curl wget ftp libgmp-dev libglib2.0-dev python3-pip pkg-config opam z3 zlib1g-dev automake autotools-dev libmpc-dev libmpfr-dev  gperf libtool patchutils bc 
 # Other python libraries used through the book.
 sudo pip3 install matplotlib scipy scikit-learn adjustText lief
 
@@ -113,6 +113,23 @@ cd ../arch_test_target/spike/device
 sed -i 's/--isa=rv32ic/--isa=rv32iac/' rv32i_m/privilege/Makefile.include
 sed -i 's/--isa=rv64ic/--isa=rv64iac/' rv64i_m/privilege/Makefile.include
 
+# Wally needs Verilator 5.0 or later.
+# Verilator needs to be built from scratch to get the latest version
+# apt-get install verilator installs version 4.028 as of 6/8/23
+sudo apt-get install -y perl g++ ccache help2man libgoogle-perftools-dev numactl perl-doc zlibc zlib1g 
+sudo apt-get install -y libfl2  libfl-dev  # Ubuntu only (ignore if gives error)
+cd $RISCV
+git clone https://github.com/verilator/verilator   # Only first time
+unsetenv VERILATOR_ROOT  # For csh; ignore error if on bash
+unset VERILATOR_ROOT  # For bash
+cd verilator
+git pull         # Make sure git repository is up-to-date
+git checkout master      # Use development branch (e.g. recent bug fixes)
+autoconf         # Create ./configure script
+./configure      # Configure and create Makefile
+make -j NUM_THREADS  # Build Verilator itself (if error, try just 'make')
+sudo make install
+
 # Sail (https://github.com/riscv/sail-riscv)
 # Sail is the new golden reference model for RISC-V.  Sail is written in OCaml, which 
 # is an object-oriented extension of ML, which in turn is a functional programming 

diff --git a/config/shared/parameter-defs.vh b/config/shared/parameter-defs.vh
@@ -11,7 +11,8 @@ parameter cvw_t P = '{
   ZICSR_SUPPORTED :      ZICSR_SUPPORTED,
   ZIFENCEI_SUPPORTED :   ZIFENCEI_SUPPORTED,
   COUNTERS :             COUNTERS,
-  ZICOUNTERS_SUPPORTED : ZICOUNTERS_SUPPORTED,
+  ZICNTR_SUPPORTED :     ZICNTR_SUPPORTED,
+  ZIHPM_SUPPORTED :      ZIHPM_SUPPORTED,
   ZFH_SUPPORTED :        ZFH_SUPPORTED,
   SSTC_SUPPORTED :       SSTC_SUPPORTED,
   VIRTMEM_SUPPORTED :        VIRTMEM_SUPPORTED,