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Extending this concept to a complete software defined PCIe emulation system #1

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ohault opened this issue Aug 25, 2023 · 0 comments
Open

Extending this concept to a complete software defined PCIe emulation system #1

ohault opened this issue Aug 25, 2023 · 0 comments

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@ohault
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ohault commented Aug 25, 2023 •
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The idea would be to provide a graph based system where PCIe block could be interconnected. Each block could have a role, mode, attribute and sub-block.

I can think of Root Complex(RC), End Point(EP), but also inside a RC, Root Port, RCiEP, i-EP, ...

Transparent bridge and non-transparent bridge(NTB)
@ohault ohault changed the title Extending this concept to a complete PCIe emulation system Extending this concept to a complete software defined PCIe emulation system Aug 25, 2023
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@ohault