Merge with other Nvm head

fchen9 · Jan 31, 2012 · f4ae687 · f4ae687
2 parents 0b43c7e + 393b6f9
commit f4ae687
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Showing 7 changed files with 49 additions and 36 deletions.
diff --git a/arch/ppc/mpc55xx/drivers/Adc.c b/arch/ppc/mpc55xx/drivers/Adc.c
@@ -42,6 +42,19 @@
 
 #define ADC_GROUP0		0
 
+#define CCM_EOQ(x)				((x)<<31)
+#define CCM_PAUSE(x)			((x)<<30)
+#define CCM_BN(x)				((x)<<25)
+#define CCM_CAL(x)				((x)<<24)
+#define CCM_MESSAGE_TAG(x)		((x)<<20)
+#define CCM_LST(x)				((x)<<18)
+#define CCM_TSR(x)				((x)<<17)
+#define CCM_FMT(x)				((x)<<16)
+#define CCM_CHANNEL_NUMBER(x)	((x)<<8)
+
+#define CAL_CH(ch)  CCM_EOQ(0) | CCM_PAUSE(0) | CCM_BN(0) | CCM_CAL(0) | CCM_MESSAGE_TAG(0) | CCM_LST(ADC_CONVERSION_TIME_128_CLOCKS) | \
+					CCM_TSR(0) | CCM_FMT(0) | CCM_CHANNEL_NUMBER(ch)
+
 #if !defined(CFG_MPC5606S)
 typedef union
 {
@@ -103,42 +116,35 @@ typedef enum
   ADC0_OCCR
 }Adc_EQADCRegisterType;
 
+
 /* Command queue for calibration sequence. See 31.5.6 in reference manual. */
 const Adc_CommandType AdcCalibrationCommandQueue [] =
 {
   /* Four samples of 25 % of (VRh - VRl). */
   {
-	.B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
-	.B.CHANNEL_NUMBER = 44
+	.R = CAL_CH(44),
   },
   {
-    .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
-    .B.CHANNEL_NUMBER = 44
+	.R = CAL_CH(44),
   },
   {
-    .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
-    .B.CHANNEL_NUMBER = 44
+	.R = CAL_CH(44),
   },
   {
-    .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
-    .B.CHANNEL_NUMBER = 44
+	.R = CAL_CH(44),
   },
   /* Four samples of 75 % of (VRh - VRl). */
   {
-    .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
-    .B.CHANNEL_NUMBER = 43
+    .R = CAL_CH(43),
   },
   {
-    .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
-    .B.CHANNEL_NUMBER = 43
+	.R = CAL_CH(43),
   },
   {
-    .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
-    .B.CHANNEL_NUMBER = 43
+	.R = CAL_CH(43),
   },
   {
-    .B.EOQ = 1, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
-    .B.CHANNEL_NUMBER = 43
+	.R = CAL_CH(43),
   }
 };
 
@@ -151,9 +157,9 @@ const Dma_TcdType AdcCalibrationDMACommandConfig =
   .DMOD = 0,
   .DSIZE = DMA_TRANSFER_SIZE_32BITS,
   .SOFF = sizeof(Adc_CommandType),
-  .NBYTESu.B.NBYTES = sizeof(Adc_CommandType),
+  .NBYTESu.R = sizeof(Adc_CommandType),
   .SLAST = 0,
-  .DADDR = (vint32_t)&EQADC.CFPR[0].R,
+  .DADDR = (vuint32_t)&EQADC.CFPR[0].R,
   .CITERE_LINK = 0,
   .CITER = 0,
   .DOFF = 0,
@@ -174,13 +180,13 @@ const Dma_TcdType AdcCalibrationDMACommandConfig =
 
 const Dma_TcdType AdcCalibrationDMAResultConfig =
 {
-  .SADDR = (vint32_t)&EQADC.RFPR[0].R + 2,
+  .SADDR = (vuint32_t)&EQADC.RFPR[0].R + 2,
   .SMOD = 0,
   .SSIZE = DMA_TRANSFER_SIZE_16BITS,
   .DMOD = 0,
   .DSIZE = DMA_TRANSFER_SIZE_16BITS,
   .SOFF = 0,
-  .NBYTESu.B.NBYTES = sizeof(Adc_ValueGroupType),
+  .NBYTESu.R = sizeof(Adc_ValueGroupType),
   .SLAST = 0,
   .DADDR = 0, /* Dynamic address, written later. */
   .CITERE_LINK = 0,
@@ -262,7 +268,6 @@ Std_ReturnType ValidateGroup(Adc_GroupType group,Adc_APIServiceIDType api)
 #if (ADC_DEINIT_API == STD_ON)
 Std_ReturnType Adc_DeInit (const Adc_ConfigType *ConfigPtr)
 {
-  (void)ConfigPtr;
 #if defined(CFG_MPC5606S)
 
   if (E_OK == Adc_CheckDeInit())
@@ -691,6 +696,8 @@ void Adc_GroupConversionComplete (Adc_GroupType group)
 		  }
 		#endif
 #if defined(CFG_MPC5606S)
+		  /* Abort conversion */
+		  ADC_0.MCR.B.ABORTCHAIN = 1;
 		  /* Disable trigger normal conversions for ADC0 */
 		  ADC_0.MCR.B.NSTART=0;
 #else
@@ -880,6 +887,9 @@ void Adc_StopGroupConversion (Adc_GroupType group)
 {
   if (E_OK == Adc_CheckStopGroupConversion (group))
   {
+	/* Abort conversion */
+	ADC_0.MCR.B.ABORTCHAIN = 1;
+
 	/* Disable trigger normal conversions for ADC0 */
 	ADC_0.MCR.B.NSTART = 0;
 
@@ -1022,6 +1032,7 @@ static void Adc_WriteEQADCRegister (Adc_EQADCRegisterType reg, Adc_EQADCRegister
 
   /* Flush result buffer. */
   temp = EQADC.RFPR[ADC_EQADC_QUEUE_0].R;
+  (void)temp;
   EQADC.FISR[ADC_EQADC_QUEUE_0].B.EOQF = 1;
 
   EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = oldMode;
@@ -1521,6 +1532,7 @@ static Std_ReturnType Adc_CheckDeInit (void)
 }
 #endif
 
+
 static Std_ReturnType Adc_CheckSetupResultBuffer (Adc_GroupType group)
 {
   Std_ReturnType returnValue = E_OK;
@@ -1554,4 +1566,3 @@ static Std_ReturnType Adc_CheckGetStreamLastPointer (Adc_GroupType group)
 }
 
 
-
diff --git a/arch/ppc/mpc55xx/drivers/Mcu.c b/arch/ppc/mpc55xx/drivers/Mcu.c
@@ -254,12 +254,12 @@ static const core_info_t *Mcu_IdentifyCore(uint32 pvr)
 
 static uint32 Mcu_CheckCpu( void ) {
 	uint32 pvr;
-	uint32 pir;
+	// uint32 pir;
 	const cpu_info_t *cpuType;
 	const core_info_t *coreType;
 
     // We have to registers to read here, PIR and PVR
-    pir = get_spr(SPR_PIR);
+    // pir = get_spr(SPR_PIR);
     pvr = get_spr(SPR_PVR);
 
     cpuType = Mcu_IdentifyCpu(pvr);

diff --git a/arch/ppc/mpc55xx/drivers/Spi.c b/arch/ppc/mpc55xx/drivers/Spi.c
@@ -1571,8 +1571,6 @@ static void Spi_WriteJob_FIFO( Spi_JobType jobIndex )
     const Spi_DataType *            buf;
     Spi_NumberOfDataType            copyCnt;
     Spi_NumberOfDataType            fifoLeft;
-    boolean                         done = 0;
-    boolean                         lastJob = 0;
 	int     i;
 	jobUnitPtr = &Spi_JobUnit[jobIndex];
 
@@ -1757,6 +1755,7 @@ static void Spi_JobWrite(Spi_JobType jobIndex) {
 }
 
 
+#if defined(USE_LDEBUG_PRINTF) && ( DEBUG_LVL <= DEBUG_HIGH )
 void Spi_PrintSeqInfo(const Spi_SequenceConfigType *seqConfigPtr) {
 	int i = 0;
 	uint32 job;
@@ -1765,8 +1764,10 @@ void Spi_PrintSeqInfo(const Spi_SequenceConfigType *seqConfigPtr) {
 	while ((job = seqConfigPtr->JobAssignment[i]) != JOB_NOT_VALID) {
 		DEBUG(DEBUG_HIGH,"%d ",job);
 		i++;
-	} DEBUG(DEBUG_HIGH,"\n");
+	}
+	DEBUG(DEBUG_HIGH,"\n");
 }
+#endif
 
 
 /**
@@ -2041,7 +2042,6 @@ void Spi_MainFunction_Driving(void) {
 	volatile struct DSPI_tag *spiHw;
 	uint32 confMask;
 	uint8 confNr;
-	Spi_UnitType *spiUnit;
 
 	// TODO: check that the queue is empty.. if so do the next job.
 	if (Spi_Global.asyncMode == SPI_POLLING_MODE) {
@@ -2055,7 +2055,6 @@ void Spi_MainFunction_Driving(void) {
 				if (spiHw->SR.B.TXRXS) {
 					// Still not done..
 				} else {
-					spiUnit = GET_SPI_UNIT_PTR(confNr);
 					Spi_Isr(confNr);
 				}
 			}

diff --git a/arch/ppc/mpc55xx/kernel/arch.c b/arch/ppc/mpc55xx/kernel/arch.c
@@ -49,18 +49,15 @@ void Os_ArchPanic( uint32_t err, void *errFramePtr , Os_ExceptionFrameType *excF
 	(void)errFramePtr;
 	switch(err) {
 	case OS_ERR_BAD_CONTEXT:
-		while(1) ;
-		break;
+		while(1) {} ;
 	case OS_ERR_SPURIOUS_INTERRUPT:
 		fputs("Spurious interrupt\n",stdout);
 		printf(" vector : %02lx\n", excFramePtr->vector);
 		printf(" srr0   : %08lx\n", excFramePtr->srr0);
 		printf(" srr1   : %08lx\n", excFramePtr->srr1);
-		while(1) ;
-		break;
+		while(1) {} ;
 	default:
-		while(1) ;
-		break;
+		while(1) {} ;
 	}
 }
 

diff --git a/common/cirq_buffer.c b/common/cirq_buffer.c
@@ -40,7 +40,11 @@
 #include <assert.h>
 #endif
 
+#if defined(__GNUC__)
 #define MEMCPY(_x,_y,_z)	__builtin_memcpy(_x,_y,_z)
+#else
+#define MEMCPY(_x,_y,_z)	memcpy(_x,_y,_z)
+#endif
 //#define MEMCPY(_x,_y,_z)	memcpy(_x,_y,_z)
 
 

diff --git a/include/IoHwAb.h b/include/IoHwAb.h
@@ -59,7 +59,7 @@
 
 #define IOHWAB_E_INIT				0x01
 
-#define IOHWAB_E_PARAM_CHANNEL		0x11
+#define IOHWAB_E_PARAM_SIGNAL		0x11
 #define IOHWAB_E_PARAM_DUTY			0x12
 
 /******************************************* DET macros *******************************************/

diff --git a/include/IoHwAb_Types.h b/include/IoHwAb_Types.h
@@ -29,6 +29,8 @@ typedef sint32 IoHwAb_AnalogValueType;
 
 //typedef sint32 IoHwAb_ChannelType;
 
+typedef sint32 IoHwAb_SignalType;
+
 /* Duty cycle type (per mille) */
 typedef uint32 IoHwAb_DutyType;
 #define IOHWAB_DUTY_MIN		   0		/*   0% */