Expand qemu-test and add tests for new instructions

Sekedo664 · Oct 16, 2022 · 8146bf6 · 8146bf6
1 parent 5bd020b
commit 8146bf6
Showing 1 changed file with 84 additions and 2 deletions.
diff --git a/tests/e2e/qemu/qemu-test.c b/tests/e2e/qemu/qemu-test.c
@@ -2116,8 +2116,8 @@ static void test_enter(void)
 #endif
 #ifdef TEST_SSE
 
-typedef int __m64 __attribute__ ((__mode__ (__V2SI__)));
-typedef float __m128 __attribute__ ((__mode__(__V4SF__)));
+typedef int __m64 __attribute__ ((vector_size (8)));
+typedef float __m128 __attribute__ ((vector_size (16)));
 
 typedef union {
     double d[2];
@@ -2134,6 +2134,73 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
     { 0x0f76255a085427f8, 0xc233e9e8c4c9439a },
 };
 
+#define MOV_OP(op, hi, rm)\
+{\
+    r.q[0] = r.q[1] = 0;\
+    if (rm) {\
+        uint64_t mem;\
+        asm volatile (#op " %1, %0" : "=m" (mem) : "x" (a.dq));\
+        printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "\n", #op, a.q[1], a.q[0], mem);\
+    } else {\
+        uint64_t mem = a.q[hi];\
+        asm volatile (#op " %1, %0" : "=x" (r.dq) : "m" (mem));\
+        printf("%-9s: a=" FMT64X " r=" FMT64X "" FMT64X "\n", #op, mem, r.q[1], r.q[0]);\
+    }\
+}
+#define MOV_OP_REGMEM(op, hi, rm)\
+{\
+    int i;\
+    for(i=0;i<2;i++) {\
+    a.q[0] = test_values[2*i][0];\
+    a.q[1] = test_values[2*i][1];\
+    MOV_OP(op, hi, rm);\
+    }\
+}
+#define MOVL_OP2(op)\
+{\
+    MOV_OP_REGMEM(op, 0, 0);\
+    MOV_OP_REGMEM(op, 0, 1);\
+}
+#define MOVH_OP2(op)\
+{\
+    MOV_OP_REGMEM(op, 1, 0);\
+    MOV_OP_REGMEM(op, 1, 1);\
+}
+#define MOVNT_OP(op, quad)\
+{\
+    r.q[0] = r.q[1] = 0;\
+    if (quad) {\
+        asm volatile (#op " %1, %0" : "=m" (r.dq) : "x" (a.dq));\
+        printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n", #op, a.q[1], a.q[0], r.q[1], r.q[0]);\
+    } else {\
+        asm volatile (#op " %1, %0" : "=m" (r.q[0]) : "y" (a.q[0]));\
+        printf("%-9s: a=" FMT64X " r=" FMT64X "\n", #op, a.q[0], r.q[0]);\
+    }\
+}
+#define MOVNT_OP2(op,quad)\
+{\
+    int i;\
+    for(i=0;i<2;i++) {\
+    a.q[0] = test_values[2*i][0];\
+    a.q[1] = test_values[2*i][1];\
+    MOVNT_OP(op, quad);\
+    }\
+}
+#define MOVU_OP(op)\
+{\
+    asm volatile (#op " %1, %0" : "=x" (r.dq) : "x" (a.dq));\
+    printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",#op, a.q[1], a.q[0], r.q[1], r.q[0]);\
+}
+#define MOVU_OP2(op)\
+{\
+    int i;\
+    for(i=0;i<2;i++) {\
+    a.q[0] = test_values[2*i][0];\
+    a.q[1] = test_values[2*i][1];\
+    MOVU_OP(op);\
+    }\
+}
+
 #define SSE_OP(op)\
 {\
     asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
@@ -2701,6 +2768,21 @@ void test_sse(void)
     // CVT_OP_XMM(cvtdq2ps);
     // CVT_OP_XMM(cvtdq2pd);
 
+    /* sse/sse2 moves */
+    MOVL_OP2(movlps);
+    MOVH_OP2(movhps);
+    MOVL_OP2(movlpd);
+    MOVH_OP2(movhpd);
+    MOVNT_OP2(movntq, 0);
+    MOVNT_OP2(movntdq, 1);
+    MOVU_OP2(movups);
+    MOVU_OP2(movupd);
+
+    /* misc sse ops*/
+    SSE_OP2(minss);
+    SSE_OP2(maxss);
+    SSE_OP2(sqrtss);
+
     /* XXX: test PNI insns */
 #if 0
     SSE_OP2(movshdup);