Marble is a dual FMC FPGA carrier board developed for general purpose use in particle accelerator electronics instrumentation. It is currently under development and the base platform for two accelerator projects at DOE: ALS-U (the Advanced Light Source Upgrade at LBNL and the LCLS-II HE (the Linac Coherent Light Source II High Energy upgrade).
The design responds deployment needs in an accelerator environment: reliability, ability to be remotely programmed, safety watchdog, self monitoring, etc. It is intended to be the base digital design for instrumentation electronics, with the capability of connecting to different I/O or analog front ends through the FMC connectors, and is optimized for cost effectiveness for deployments of hundreds of units. It is based on a Network Attached Device (NAD) approach, where high-speed serial links serve as the communication backbone with other systems in the accelerator.
The Marble design is fully Open Source (licensed under the CERN Open Hardware License v1.2) and designed using Open Source tools (KiCAD).
The schematic/layout tool used is KiCad EDA version 5.1.8; you can feel comfortable using KiCad version 5.1.x, where x ≥ 5. Other versions will very likely either not read the files in this repo, or will save files that are not compatible with collaborators' reference installations. We also make use of KiBoM.
See more comments about KiCad versions in design/scripts/README.md.
- U1: Xilinx XC7K160T-FFG676 FPGA
- SK1: 204-pin DDR3 SO-DIMM
- U54: ST STM32F207VCT6 Microcontroller
- U4: Marvell 88E1512 Ethernet PHY
- U20: TI CDCM61004 Clock Generator
- U23: FTDI FT4232H-56Q USB interface
- U35: Maxlinear XRP7724 Quad PWM Power Controller
- Y1: Taitien TXEAADSANF-25.000000 25 MHz VCTCXO
Documentation is available in the docs directory:
If you have a physical board that has already been tested you can jump directly to the User Guide. If you need to qualify, test or troubleshoot a board, you can use the fabrication acceptance test guide. These documents are also available as artifacts for each fabrication release.
Other documentation includes information on the XRP7724 PWM Power Controller, which has its own README, and notes on current measurement capabilities
The Marble design source files, along with documentation, are available in this repository under version control. Other non-source artifacts (such as fabrication packages) are available for download for each manufactured release. If you would like to manufacture Marble boards from any of the released version, download the manufacturing package for that particular version from the list of artifacts and request a quote from your favorite vendor. Marble is not yet available as a catalog item from any of our manufacturing partners.
When a new design version of Marble is ready for manufacture, a release is tagged in this repository and the corresponding artifacts are made available for download (e.g. manufacturing package, documentation, etc.). The physical boards have a QR code on them, pointing to the board's tagged release on GitHub so a physical board can be mapped to the source code and fabrication package used for its manufacture.
Updating the QR code for a new release, updating the silkscreen design accordingly and generating a fabrication package is a process in itself. That and other processes are partially scripted. Additional information on those processes and the scripts used can be found in the scripts subdirectory. A README covers the following:
- Inserting QR code on silkcsreen
- Generating artifacts for manufacturing
- Generating Xilinx constraint file
- Updating the I2C subsystem diagram in schematics
The initial design is supported by the Berkeley Accelerator Controls and Instrumentation (BACI), a DOE High Energy Physics (HEP) General Accelerator R&D (GARD) program and carried out by the Accelerator Technology Group (ATG) at LBNL, in collaboration with the Warsaw University of Technology (WUT) and Creotech Instruments in Poland.
The board was designed by Michal Gaska (WUT) and Larry Doolittle (LBNL) is the mastermind behind the design. Michael Betz, Vamsi Vytla, Sergio Paiagua and Eric Norum (LBNL) have also contributed to the design and supporting software and firmware throughout the development.