Marble is a dual FMC FPGA carrier board developed for general purpose use in particle accelerator electronics instrumentation. It is currently under development and the base platform for two accelerator projects at DOE: ALS-U (the Advanced Light Source Upgrade at LBNL and the LCLS-II HE (the Linac Coherent Light Source II High Energy upgrade).
The design responds deployment needs in an accelerator environment: reliability, ability to be remotely programmed, safety watchdog, self monitoring, etc. It is intended to be the base digital design for instrumentation electronics, with the capability of connecting to different I/O or analog front ends through the FMC connectors, and is optimized for cost effectiveness for deployments of hundreds of units. It is based on a Network Attached Device (NAD) approach, where high-speed serial links serve as the communication backbone with other systems in the accelerator.
The Marble design is fully Open Source (licensed under the CERN Open Hardware License v1.2) and designed using Open Source tools (KiCAD).
The schematic/layout tool used is KiCad EDA version 5.1.8; you can feel comfortable using KiCad version 5.1.x, where x ≥ 5. Other versions will very likely either not read the files in this repo, or will save files that are not compatible with collaborators' reference installations. We also make use of KiBoM.
See more comments about KiCad versions in design/scripts/README.md.
- U1: Xilinx XC7K160T-FFG676 FPGA
- SK1: 204-pin DDR3 SO-DIMM
- U54: ST STM32F207VCT6 Microcontroller
- U4: Marvell 88E1512 Ethernet PHY
- U20: TI CDCM61004 Clock Generator
- U23: FTDI FT4232H-56Q USB interface
- U35: Maxlinear XRP7724 Quad PWM Power Controller
- Y1: Taitien TXEAADSANF-25.000000 25 MHz VCTCXO
25-page schematics like this are a modern reality, but that doesn't mean they are easy to navigate. To aid in understanding subsystems that are splattered over multiple sheets, here are block diagrams that can act as introductions or indexes to the actual machine-readable and DRC'd schematics.
- I2C subsystems: marble_i2.eps
- Power Routing: m_power.eps
These are EPS files, authored using xcircuit. Maybe you want to use GhostView to look at them.
Also see notes on current measurement capabilities at runtime.
Our use of the XRP7724 PWM Power Controller has its own README.
See the scripts subdirectory for instructions and helper scripts covering:
- Updating the I2C subsystem diagram in schematics
- Inserting QR code on silkcsreen
- Generating artifacts for manufacturing
- Generating Xilinx constraint file
The initial design is supported by the Berkeley Accelerator Controls and Instrumentation (BACI), a DOE High Energy Physics (HEP) General Accelerator R&D (GARD) program and carried out by the Accelerator Technology Group (ATG) at LBNL, in collaboration with the Warsaw University of Technology (WUT) and Creotech Instruments in Poland.
The board was designed by Michal Gaska (WUT) and Larry Doolittle (LBNL) is the mastermind behind the design. Michael Betz, Vamsi Vytla, Sergio Paiagua and Eric Norum (LBNL) have also contributed to the design and supporting software and firmware throughout the development.