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GitGitHubMasterlcass
GitGitHubMasterlcass PublicForked from LaloCo/GitGitHubMasterlcass
First repository of the LPA's Git and GitHub Masterclass
HTML
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vsdmixedsignalflow
vsdmixedsignalflow PublicForked from praharshapm/vsdmixedsignalflow
This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also discusses the steps to modify the current IP layouts inorder to …
Verilog
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avsdpll_1v8
avsdpll_1v8 PublicForked from lakshmi-sathi/avsdpll_1v8
8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x multiplied clock at ~50% duty cycle on tt corner at room tempe…
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Physical-Design
Physical-Design PublicForked from akilm/Physical-Design
Physical Design Flow from RTL to GDS using Opensource tools.
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openlane_sky130
openlane_sky130 PublicForked from renu883/openlane_sky130
repository for openlane workshop
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