Sethu Raman A.

I am a pre-final year Electronics and Communication Engineering undergraduate at IIT Bhubaneswar, with a strong technical foundation and a CGPA of 8.80/10. My expertise spans hardware design, FPGA programming, and embedded systems. I have hands-on experience with Verilog, Xilinx Vivado, and tools like LTspice, MATLAB, and Logisim, demonstrated through projects such as a custom IP core for image processing, digital clock implemented on FPGA and also simulated complex digital circuits on logisim. My proficiency extends to programming in C, C++, and Python, as well as Arduino programming and PCB design.