Fpga xilinx vhdlроботи

Науково-дослідний проект в галузі неруйнівного контролю. ____________________________________________________________ Scientific research project in the field of non-destructive testing.

Project Description: We are seeking an experienced FPGA developer with expertise in networking (ideally with the AMD Alveo U50 platform) to provide consultation for our project. We are specifically interested in establishing basic network connectivity and sending IP packets over the U50's QSFP port to a 10GbE SFP+ router. Required Skills: Strong understanding of FPGA design principles and methodologies. Hands-on experience with AMD Alveo U50 and its networking capabilities. Familiarity with Ethernet MAC IP cores to use on Alveo U50 Knowledge of XRT, Xilinx Vivado Design Suite and Vitis development environment. Experience with network programming and protocols (SFP+, QSFP, Ethernet, TCP/IP). Excellent communication and problem-solving skill...

Hi there I did read your project description and it looks you are looking for an electronics engineer having experience in circuit, PCB layout designing, and microcontrollers coding/firmware development. My name is Engr. Saddam Gul, I am an electronics engineer having 5+ years of experience in circuits designing, PCB layout designing, and embedded system microcontrollers (Arduino, ESP32, FPGA, C2000, STM, and Rpi) coding/firmware development. I have successfully executed numerous complex projects, which you can view in my portfolio as samples. Please feel free to share more details about your project, and don't hesitate to contact me for any further discussions. Thank you Regards Engr. Saddam Gul

I am seeking a highly skilled Technical Report Writer with experience in FPGA development, PCB design, and electronic hardware integration to document a comprehensive report on the LVDS to MIPI CSI-2 video stream conversion project.

I am seeking a highly skilled Technical Report Writer with experience in FPGA development, PCB design, and electronic hardware integration to document a comprehensive report on the LVDS to MIPI CSI-2 video stream conversion project.

We are seeking assistance from an experienced freelancer who has worked on executing AI models on Xilinx-based FPGAs through TVM. The goal is to execute AI models trained with TensorFlow on a Xilinx FPGA, specifically the Ultra96v2 board. We are following the guidelines to execute a TVM-compiled AI model using the Vitis AI DPU. We are looking for validated tips to solve each issue and require remote support or virtual meetings. The available platforms for remote assistance include Skype, Zoom, Webex, and Microsoft Teams. Currently, we are using TensorFlow version 2.18, PYNQ version 3.0.1, Vitis AI version 2.5, and TVM version 0.19. 1. TensorFlow Model Conversion Error While following the example (), to convert a TensorFlow

I am seeking a highly skilled Technical Report Writer with experience in FPGA development, PCB design, and electronic hardware integration to document a comprehensive report on the LVDS to MIPI CSI-2 video stream conversion project.

...in Altera FPGA and electronics to develop a smart automatic door lock system. The system should use an electronic strike solenoid lock and operate based on a 4x3 keypad input. Key project requirements: - The lock should open when a correct passcode is entered. There will be three different passcodes programmed into the system. - If the user fails to enter the correct password after three tries, the system should implement a 20-second cooldown period before allowing attempts to restart. - A display screen should provide feedback when the correct passcode is entered. You will also need to provide guidance on how to connect the GPIO pins of the Altera DE0 Nanobot to a servo motor to simulate the door opening. The ideal candidate for this project should have a strong background in ...

Hi, I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices optimized for Markov Chain Monte Carlo (MCMC) computations. These computations are integral to the

I'm working on a digital circuit design project focused on a finite state machine (FSM) for a lock system. I need assistance with the design and implementation using VHDL on a Basys3 FPGA board. Ideal Skills: - Proficiency in VHDL - Experience with digital circuit design - Familiarity with FSMs Key Tasks: - Design a FSM for a lock system - Implement the design using VHDL - Test the design on a Basys3 FPGA board Please provide examples of similar projects you've completed in your proposal.

I'm looking for an expert in HDI grade PCB design for a compact 23mm x 11mm PCB. This design is intended for a consumer electronics device. Key Requirements: - The PCB needs to accommodate various components: Sensors, LEDs, FPGA, and Buffer memory. - Sequential illumination - The design should be suitable for indoor use only. Ideal Skills: - Proficiency in PCB design software. - Experience in designing PCBs for consumer electronics. - Familiarity with the integration of sensors, FPGAs, and buffer memory on PCBs. - Knowledge of HDI grade PCB design. Please provide relevant samples of your past work.

...involving Xilinx ISE Design software version 14.7. The project encompasses a sign calculator and the implementation of LED patterns & seven segment display on the FPGA. Here's a more detailed breakdown of the tasks: - **Sign Calculator Implementation**: - The calculator should support basic arithmetic operations such as addition, subtraction, multiplication, and division. - It should be designed using a combination of combinational and sequential logic using Verilog. - **LED Patterns on FPGA**: - The LED patterns should be generated randomly. - You should have experience in creating dynamic and visually appealing patterns. - **Seven Segment Display on FPGA**: - The project involves configuring a seven segment display on the FPGA. ...

I'm seeking an FPGA expert proficient in VHDL for a multi-part project. The centerpiece is a digital alarm clock displayed on an LCD, with the following tasks to be completed: 1) A counter that counts from 0000-9999. It should be able to reset and be controlled using a pushbutton, displaying in decimal on 7-segment displays. 2) A digital alarm clock. The clock should display on an LCD and turn on an LED when the current time matches the alarm time. 3) Generation of a waveform. 4) Configuration of pins. 5) A demo video of the completed project. The digital alarm clock is the highest priority, so experience with time-based VHDL projects will be advantageous. Please note, the digital alarm clock does not need to include additional features such as a snooze function...

I'm seeking an expert FPGA designer with Verilog proficiency to develop a custom hardware accelerator. Key Responsibilities: - Design an FPGA-based hardware accelerator specifically for managing sequential DMA reads and writes for memory access (TRBs). - Implement this using Verilog. Requirements: - Extensive experience with Xilinx FPGA family. - Proficiency in Verilog. - Prior work in designing custom hardware accelerators. - Knowledge in handling DMA operations. - Ability to translate complex hardware functions into Verilog code. The goal of this project is to create an efficient, reliable hardware solution that can handle specific memory access tasks with optimal performance.

I'm in need of a professional who can assist me with simulating sequential logic circuits, specifically flip-flops and latches, using VHDL. Key Responsibilities: - Simulate sequential logic circuits using VHDL - Focus on flip-flops and latches Ideal Skills: - Proficiency in VHDL - Experience with simulating sequential logic circuits - Understanding of flip-flops and latches Your expertise will be pivotal in ensuring the successful simulation of these circuits. Looking forward to your proposals.

...experienced professional with a strong background in designing DMA controllers for the Artix 7 FPGA (xc7a35t). The ideal candidate will have a proven track record of working on similar projects and possess in-depth knowledge of FPGA architecture and DMA operations. You will be responsible for developing and optimizing a robust DMA controller tailored for our specific application needs. If you are passionate about FPGA design and have hands-on experience with Artix 7, we would love to hear from you. I'm using pcileech project () and I'm trying to modify it. I'm stuck with one part that I need help with, that is I need DMA from within the FPGA design. For example I want to read/write from physical memory addresses from within the pcileech_a7

Request for Assistance from an Experienced Freelancer with Running AI Models on Xilinx FPGA Using TVM We are looking for an expert with experience in running AI models on Xilinx-based FPGAs using TVM. We need someone who can provide tips for resolving issues through video tutorials or documentation. If necessary, we are open to remote support or virtual meetings to address the problems. Our goal is to run AI models trained in TensorFlow on a Xilinx Ultra96v2 FPGA board. Following the instructions provided in the linked guide, we are executing AI models compiled with TVM using the Vitis AI DPU. The tools and versions currently being used are as follows: • PYNQ: Version 3.0.1 • Vitis AI: Version 2.5 • TVM: Version 0.19 Below are the issues we...

I am looking for a professional with extensive knowledge in computer architecture to assist with an upcoming project. The ideal candidate should have a strong background in processor design, memory hierarchy, and I/O systems. Experience with performance optimi...with performance optimization, power efficiency, and scalability is a plus. Key Skills & Experience: - Extensive knowledge in computer architecture - Strong background in processor design, memory hierarchy, and I/O systems - Experience with performance optimization, power efficiency, and scalability - Proficiency in simulation or modeling tools related to computer architecture. - Proficiency in VHDL/Verilog for hardware design. Deliverable is a comprehensive technical report. The main objective is to create a video fo...

I need an expert to create a single lane bidirectional differential sender/receiver that connects two Xilinx FPGAs. Key Requirements: - The main purpose of this connection is data transfer between the two FPGAs. - The target data transfer rate is up to 1 Gbps (typ. 500 MBaud in DDR fashion) Ideal Skills: - Proficiency in FPGA programming, particularly with Xilinx FPGAs. - Familiarity with the SerDes, IO-Delay, clocking archtecture of Spartan-6 - Language: VHDL Please do not post any suggestions unless you have experience in VHDL coding.

I am seeking a highly skilled Technical Report Writer with experience in FPGA development, PCB design, and electronic hardware integration to document a comprehensive report on the LVDS to MIPI CSI-2 video stream conversion project.

I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices

I am seeking a highly skilled Technical Report Writer with experience in FPGA development, PCB design, and electronic hardware integration to document a comprehensive report on the LVDS to MIPI CSI-2 video stream conversion project.

...Virtuoso,Xcelium,Spectre,Allegro,Vivado,Quartus,ModleSim, Matlab,Octave,Signal Generator,Logic Analyzer,Anaconda,Tensorflow,Keras,Darknet ,notepad++. Language mastery: Verilog,SystemVerilog,UVM,C,C++,VHDL,Python,Firmware etc. Familiar with using: Linux, Windows,Unix,MS-DOS,FreeRTOS. PreviousFields: AISC/IP/IC design,SOC design/verification,FPGA Design/Verification and debugging,AI (especially deep learning),complex digital systems,complex communication systems,mixed digital and analog systems. Work experience focused in Beijing China 5+ years of ASIC experience and 10+ years of FPGA experience, experienced Senior Technical Lead with a demonstrated history of working in the semiconductors industry. Part of 5+ tape outs. Lead Subsystem and ASIC/SoC front e...

...Management: Techniques for optimizing power consumption in embedded devices. - Wireless Communication: Implementing wireless technologies like Bluetooth and WiFi. - PCB Design: Fundamentals of designing printed circuit boards for embedded systems. - Embedded Security: Best practices for securing embedded systems. - Bootloaders: Writing and understanding bootloaders for embedded systems. - FPGA Basics: Introduction to FPGA programming and usage in embedded systems. Ideal skills for the job include: - Extensive knowledge in embedded systems - Experience in teaching complex topics to beginners - Proficiency in Embedded C programming - Understanding of IoT systems I am aiming to build a solid foundation in embedded systems, so patience and clarity in explanations are key. L...

I'm looking for an expert who can implement a 1D deep learning inference accelerator on an FPGA. The primary objective is to optimize resource usage, with a specific focus on balancing power and resource efficiency. Work on vitis hls xilinx Key Requirements: - Experience with FPGA programming and optimization - Familiarity with Fully Connected Networks - Ability to balance power consumption and resource efficiency I want this project to be able to support fully connected networks primarily, so deep learning experience with these types of models is crucial. The ideal freelancer for this job will not only have technical expertise, but also a strong understanding of how to maximize efficiency in both power usage and resource allocation.

The company is seeking FPGA Designers proficient in VHDL to outsource specific tasks. Some tasks will require a remote server connection for accessing resources and collaborative development. Skills Required: Proficiency in VHDL for FPGA design and development. Experience with simulators such as ModelSim or Active-HDL/Riviera. Additional Skills (Considered a Plus): Expertise in synthesis and implementation processes. Proficiency in Tcl scripting for automation and tool customization. Experience with debugging and testing using tools like ILA (Integrated Logic Analyzer), SignalTap, or similar. Familiarity with embedded software development, including: Writing bare-metal C/C++ for testing Zynq firmware. Developing or customizing a complete PetaLinux OS. Soft...

We are seeking a skilled Embedded Software Engineer with expertise in developing and integrating software for embedded systems. This role involves working closely with FPGA designs and ensuring seamless software functionality for various applications. If you have experience in C/C++, Linux for embedded systems, and custom driver development, we’d love to hear from you. Prior experience with Xilinx Zynq devices is a significant advantage. Key Responsibilities: Develop and maintain embedded software for systems interfacing with FPGA designs. Implement software solutions in C/C++ for embedded applications. Design and integrate custom drivers in both kernel and user space. Work with Linux-based embedded systems, including Petalinux and Yocto Project. Collaborate w...

Need an embedded systems expert to work on a project. Please only bid if you have good experience in stm and fpga

I'm looking for an experienced professional to help debug my Verilog code, Xilinx Vivado, FPGA; specifically focusing on UART communication related to data transmission. I'm currently at the final testing stage and encountering issues with incorrect data output. Key Requirements: - Expertise in UART communication, particularly in data transmission - Proficiency in Verilog coding - Experience in debugging and troubleshooting Verilog code - Ability to identify and resolve issues causing incorrect data output - Familiarity with simulation software such as ModelSim or Vivado

I'm seeking a skilled technical writer with a strong background in VLSI digital design to create an educational document aimed at intermediate learners. The document should focus on HDL (Verilog/VHDL) and provide clear, comprehensive explanations of the concepts, techniques, and applications pertinent to this area of digital design. Key Requirements: - In-depth knowledge and experience in VLSI digital design and HDL (Verilog/VHDL). - Proven technical writing skills, particularly in creating educational materials. - Ability to explain complex concepts in an accessible way for intermediate learners. The final document should be well-structured, engaging, and suitable for use as a teaching resource. The document should be between 25-50 pages.

Topic Investigation of the Video Stream Transcoding Protocol Explanation Convert the video stream protocol from the LVDS protocol to the MIPI CSI-2 protocol used by Raspberry PI or Nvidia Jetson. To achieve this goal, a printed circuit board must be designed. FPGA processors are commonly used for conversion, so FPGA software may need to be developed

I'm seeking an experienced FPGA developer to assist with a project centered around the Nexys A7. The work primarily involves SystemVerilog implementation. Ideal skills and experience for the job: - Extensive knowledge and experience with FPGA - Proficiency in SystemVerilog - Familiarity with Nexys A7

I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices

I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices

I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices

Development of a multichannel sensor array with TCP/IP data transport. Familiarity with implementation of a full network stack and bridging to sensor subsystems. The system should handle moderate data rates. Sensor linearization and PID control will be p...TCP/IP data transport. Familiarity with implementation of a full network stack and bridging to sensor subsystems. The system should handle moderate data rates. Sensor linearization and PID control will be performed on future versions of the system. DSP layers for basic spectral filtering as well as array sensitivity optimization algorithms to be developed The development platform for the FPGA will be Xilinx and the first phase of the project will utilize an existing code base that has undergone significant testing o...

I'm seeking a highly skilled engineer proficient in FPGA implementation and DSP algorithms. The main objective of this project is to process sensor data in real time using the FPGA. Key Responsibilities: - Implement and optimize complex DSP algorithms on the FPGA. - Ensure efficient real-time signal processing. - Integrate TCP/IP for data transmission and control. Ideal skills include: - Extensive experience with FPGA and DSP. - Proficient in TCP/IP networking. - Strong background in real-time signal processing and sensor data handling. Please provide examples of relevant past projects with your bid.

I'm seeking an experienced FPGA developer to assist with a project centered around the Nexys A7. The work primarily involves SystemVerilog implementation. Ideal skills and experience for the job: - Extensive knowledge and experience with FPGA - Proficiency in SystemVerilog - Familiarity with Nexys A7

I'm currently working on an FPGA project centered around embedded systems. I need a professional who can assist with the design and development of this project. Ideal Skills and Experience: - Proven experience in FPGA design and development - Proficient in embedded systems - Strong problem-solving skills and attention to detail - Able to translate requirements into technical specifications - Excellent communication skills to facilitate collaboration and understanding

I am seeking an experienced person for doing FIL (FPGA in the loop) simulation of a 3-phase grid-connected inverter system in Simulink, including a boost converter with P&O MPPT and DC-AC inverter with PWM generator and PLL. It is required to develop the Simulink model, run FIL simulations for the control part of the inverter, and determine the execution/processing time of the FPGA. Key Tasks: - Create the Simulink model - Execute FIL simulations focusing on the inverter's control system - Measure the execution and processing time of the FPGA - Validate the FIL simulation results against theoretical calculations. The simulations will be conducted using the Intel Cyclone V FPGA. The simulation results should include detailed performance metrics inclu...

I need help in a project. All what I have to do is already given (manual). I need help to do the exercises given

I need an expert in digital circuit design or FPGA to build a controller for a miniature elevator. The elevator will operate between three floors, each equipped with a push button, LED, and Reed-switch. Key Requirements: - Utilize FPGA as the development platform. - Implement direct control of the elevator via push buttons. - Program the system to ignore commands when the elevator is already on the selected floor. Ideal Skills: - Proficiency in FPGA and digital circuit design. - Experience with building control systems for mechanical devices. - Knowledge of using push buttons, LEDs, and Reed-switches in circuit design. The project involves programming a 7-segment display to show the current floor, and potentially using LEDs to indicate the elevator's position....

Topic Investigation of the Video Stream Transcoding Protocol Explanation Convert the video stream protocol from the LVDS protocol to the MIPI CSI-2 protocol used by Raspberry PI or Nvidia Jetson. To achieve this goal, a printed circuit board must be designed. FPGA processors are commonly used for conversion, so FPGA software may need to be developed

I'm looking for an expert in CNN and FPGA development. The task is to build a Convolutional Neural Network on a PYNQ Z2 board using Vitis and Vivado's block diagram. Key Requirements: - The CNN will be processing low-resolution images (64x64). - Familiarity and proficiency with the PyTorch library is a must, as this will be the preferred tool for building the CNN. - Extensive experience with the Vitis and Vivado software is required. - Knowledge of FPGA programming and hardware-software co-design is a big plus. I need a professional who can deliver a high-quality CNN implementation on this specific hardware. Please include examples of similar projects you've completed in your bid.

• Description We are exploring FPGA programming to mine crypto. You are responsible for programming to set up a pilot study remotely. We are likely to go for Xilinx, but you can suggest otherwise. The end product/code will run on our FPGA device. You will be paid on the base rate for the project, plus a bonus of a % of the revenue generated. • Bidding Your bid is my budget. If you deliberately put in a low bid to attract me to speak to you, you either revise your bid, or I will ignore you. • Delivery We need the source code and will integrate your program into a much larger one. You will be paid once you finish all the work and it works on my machine. We will also attack your program, as it has to be secure and reliable without loopholes. It has to be...

...to MIPI CSI-2, compatible with Raspberry PI or Nvidia Jetson. This project involves designing a PCB and potentially developing FPGA software. Key Requirements: - PCB Design: As there are no pre-existing specifications, you will need to create detailed designs for the printed circuit board. - FPGA Software Development: The FPGA software will need to handle both protocol conversion and signal enhancement. Experience with Xilinx FPGA platforms is crucial. Ideal Skills: - PCB Design: Proficiency in designing PCBs with the ability to create detailed specifications. - FPGA Software Development: Extensive experience with Xilinx platforms and designing software for FPGA processors. - Signal Processing: Skill in enhancing signals during p...

I need a freelancer who can design an 8-bit u...need a freelancer who can design an 8-bit up/down counter on an FPGA for me. This counter should be binary based and capable of interfacing with a 10MHz clock. Key Requirements: - Design an 8-bit binary up/down counter - Implement 'clear' and 'load' features - Synchronize with a 10MHz clock Ideal Skills: - Proficiency in FPGA development - Experience with digital circuit design - Familiarity with binary counter design The counter should interface with an LED display for output. Please use a Xilinx FPGA platform for this project. The counter should reset to zero. Please ensure the counter can load a value from an input signal. The counter should be controlled using button input for up/down cou...

I am seeking an experienced VHDL programmer to assist in the development of a digital circuit design for FPGA implementation. The project involves creating VHDL modules for a state machine-based system designed to generate and store Fibonacci numbers in RAM. The key components of this project include: Main FSM Controller: Develop a Finite State Machine (FSM) to manage the generation and storage of Fibonacci numbers, handling state transitions based on external inputs. Debouncer: Implement a debouncer module to stabilize the input signals from physical buttons, ensuring clean transitions and preventing bounce-related issues. Counter: Create a counter module that will provide address generation for the RAM, managing the read/write operations based on the FSM's st...

I'm looking for an experienced FPGA engineer, proficient with HLS, to implement the Viterbi (VIT) model on a Xilinx FPGA. The primary goal of this project is to significantly reduce the processing time for image data. Key requirements: - Extensive experience in FPGA programming, particularly with Xilinx platforms. - Proficient in High-Level Synthesis (HLS). - Prior experience with implementing the Viterbi model. - Strong understanding of image data processing. The ideal candidate will have a proven track record of successful FPGA projects, with the ability to deliver high-quality work under tight deadlines. Your expertise will help streamline our image data processing, making it faster and more efficient.

I'm seeking an expert in neuromorphic computing and coprocessor design for a university project. The primary deliverable is simulating the designed coprocessor using Verilog. Key project components include: - Designing a custom neuromorphic cop...neuromorphic computing and coprocessor design for a university project. The primary deliverable is simulating the designed coprocessor using Verilog. Key project components include: - Designing a custom neuromorphic coprocessor tailored for the project. - Producing simulation results using Verilog. Ideal skills and experience for the job: - Extensive experience with Verilog and other simulation tools. (Xilinx vivado) - Proven track record of designing and simulating custom hardware. - Ability to deliver high-quality, detailed simu...