AI Model Execution on Xilinx FPGA Assistance

We are seeking assistance from an experienced freelancer who has worked on executing AI models on Xilinx-based FPGAs through TVM. The goal is to execute AI models trained with TensorFlow on a Xilinx FPGA, specifically the Ultra96v2 board. We are following the guidelines to execute a TVM-compiled AI model using the Vitis AI DPU. We are looking for validated tips to solve each issue and require remote support or virtual meetings. The available platforms for remote assistance include Skype, Zoom, Webex, and Microsoft Teams. Currently, we are using TensorFlow version 2.18, PYNQ version 3.0.1, Vitis AI version 2.5, and TVM version 0.19. 1. TensorFlow Model Conversion Error While following the example ([login to view URL]), to convert a TensorFlow AI model into a relay model, we encountered an error using the function tvm.relay.frontend.from_tensorflow: "TypeError: dense() got an unexpected keyword argument 'grad_a'". It appears that this issue arises due to differences in argument handling as TensorFlow evolved from version 1 to version 2 ([login to view URL]). We need confirmation on whether our understanding is correct and a validated code example to load AI models trained and saved as TensorFlow 2 saved models and convert them into relay models. 2. Building TVM Runtime on Ultra96v2 Following the steps ([login to view URL]) to build TVM on the Ultra96v2 board, we encountered an error when executing import [login to view URL] as relay: "AttributeError: module 'tvm.relay._ffi_api' has no attribute 'Any'". This appears to be caused by a dependency issue where a required library might be missing during runtime installation ([login to view URL]). If this diagnosis is correct, we need additional setup steps or guidance on adjusting compatible versions beyond the official documentation. If incorrect, we require assistance in identifying the root cause and resolving it. 3. DPU Virtual Implementation and Simulation When using VTA in the past, we could verify functionality through the VTA simulator ([login to view URL]) . We need to know if a similar simulation method exists for the DPU in Vitis AI. Specifically, we are looking for an example to simulate the relay model on a virtual DPU to validate functionality and obtain test vectors. The simulation must confirm proper operation on the Ultra96v2 board.