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    2,000 vhdl verilog lexer trabalhos encontrados
    Cronômetro Digital - Display de 7 segmentos
    Encerrado left

    Composto de 7 segmentos de LEDs que podem ser acionados individualmente. Diagrama de blocos, Linguagem VHDL. Trabalho que visa a programção de um display 7 segmentos, o ponto é: temos os codigos prontos e a maneira como deve ficar o diagrama de blocos. Estamos procurando alguem para nos ajudar na criação do diagrama de bloco para cada programação e no final, juntar cada diagrama/programação em um só sistema, como também temos uma imagem de como devem ficar. Utilizando o programa Quartus II e VHDL. Temos um pdf de passo a passo de cada programação e uma imagem de como cada programação deve ficar o seu diagrama de blocos.

    Altera Quartus Verilog / VHDL
    $159 Average bid
    $159 Média
    5 ofertas
    Ofertar agora
    Project for Lívia R.
    Encerrado left

    Boa tarde, Lívia! Gostaria de ter a sua consultoria para o meu projeto, que consiste em integrar um processador (construído em verilog) a um Gerenciador de processos. No entanto, o prazo é apertado: dia 22/02 terça-feira. Não tenho problema com pagar a mais.

    Reescrever Artigos Redação de Conteúdo Design Digital Engenharia Elétrica Eletrônica
    $50 / hr Average bid
    $50 / hr Média
    1 ofertas
    Ofertar agora
    Project for Canisio B.
    Encerrado left

    Boa tarde, Canisio! Gostaria de ter a sua consultoria para o meu projeto, que consiste em integrar um processador (construído em verilog) a um Gerenciador de processos. No entanto, o prazo é apertado: dia 22/02 terça-feira. Não tenho problema com pagar a mais.

    Programação C Software Integrado LaTeX Matlab and Mathematica Tradutor de Português
    $20 / hr Average bid
    $20 / hr Média
    1 ofertas
    Ofertar agora
    Project for Nilson E.
    Encerrado left

    Boa tarde, Nilson! Gostaria de ter a sua consultoria para o meu projeto, que consiste em integrar um processador (construído em verilog) a um Gerenciador de processos. No entanto, o prazo é apertado: dia 22/02 terça-feira. Não tenho problema com pagar a mais.

    Programação C# Programação C++ Verilog / VHDL
    $35 / hr Average bid
    $35 / hr Média
    1 ofertas
    Ofertar agora
    Project for Iaçanã I.
    Encerrado left

    Boa tarde, Iaçanã! Gostaria de ter a sua consultoria para o meu projeto, que consiste em integrar um processador (construído em verilog) a um Gerenciador de processos. No entanto, o prazo é apertado: dia 22/02 terça-feira. Não tenho problema com pagar a mais.

    Algoritmo Programação C Python Verilog / VHDL x86/x64 Assembler
    $7 / hr Average bid
    $7 / hr Média
    1 ofertas
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    Elevador duplo
    Encerrado left

    I need a Verilog code simulating two 7-storey elevators, where the elevator that will arrive will be the closest to the floor it was called. I can give more information about the project privately. Preciso que seja feito um código Verilog simulando dois elevadores de 7 andares, onde o elevador que chegará será o mais próximo do andar que o mesmo foi chamado. Posso dar mais informações do projeto de forma privada.

    FPGA Verilog / VHDL
    $46 Average bid
    $46 Média
    1 ofertas
    Ofertar agora
    Project for Nilson E. -- 2
    Encerrado left

    Olá Nilson E., eu vi seu perfil e gostaria de lhe oferecer meu projeto, preciso que seja feito um código Verilog simulando dois elevadores de 7 andares, onde o elevador que chegará será o mais próximo do andar que o mesmo foi chamado. Posso dar mais informações do projeto de forma privada.

    Verilog / VHDL
    $35 Average bid
    $35 Média
    1 ofertas
    Ofertar agora
    Project for Nilson E.
    Encerrado left

    Olá Nilson E., eu vi seu perfil e gostaria que você me ajudasse, preciso que seja feito um código em VHDL simulando dois elevadores de 5 andares, onde o elevador que chegará será o mais próximo do andar que o mesmo foi chamado. Posso dar mais informações do projeto de forma privada, mas é basicamente isso.

    Programação C# Programação C++ Verilog / VHDL
    $31 Average bid
    $31 Média
    1 ofertas
    Ofertar agora
    Projeto dois elevadores em QUARTUS utilizando VHDL
    Encerrado left

    Preciso que seja feito um código no quartus prime II em VHDL simulando dois elevadores de 7 andares, onde o elevador que chegará será o mais próximo do andar que o mesmo foi chamado. Posso dar mais informações do projeto de forma privada, mas é basicamente isso. Deve conter waveform.

    FPGA Verilog / VHDL
    $37 Average bid
    $37 Média
    2 ofertas
    Ofertar agora
    Construa um projeto em Verilog
    Encerrado left

    Criar um processador em verilog, contendo as especificações citadas no pdf.

    Engenharia FPGA Java Arquitetura de software Verilog / VHDL
    $195 Average bid
    $195 Média
    6 ofertas
    Ofertar agora
    Portar código em "C" para Vhdl / Verilog, ( placas Fpga / Spartan 6 Xillinx / Asic )
    Encerrado left

    O freelancer deverá conhecer as linguagens = C / vhdl / verilog e já ter trabalhado com FPGA / ASIC Portar e otimizar um código que já tenho pronto em "c" para vhdl ou verilog esse código gera uma string de 14 / 15 dígitos, será usado uma placa fpga xillinx spartan 6 ( a empresa xillinx disponibiliza todo o ambiente necessário ). converter a string em Sha256 usando placa asic depois de convertido em sha256 compara com um sha256 informado no inicio do processo, se igual finaliza, se não reinicia o processo. Deverá ser usado a Raspberry Pi 3 para termos uma interface ( teclado e monitor ) para inserir o código inicial

    Programação C Eletrônica FPGA Microcontrolador Verilog / VHDL
    $225 Average bid
    $225 Média
    2 ofertas
    Ofertar agora
    Criar Jogo em VGA (verilog para fpga)
    Encerrado left

    Implementar um jogo em verilog ou vhdl em vga

    Verilog / VHDL
    $87 Average bid
    $87 Média
    6 ofertas
    Ofertar agora
    Contratar um Assistente Virtual
    Encerrado left

    Jogo VGA em Verilog para FPGA

    Assistente virtual
    $96 Average bid
    $96 Média
    3 ofertas
    Ofertar agora
    VHDL/verilog
    Encerrado left

    Segue trabalho em anexo

    Processamento de Dados
    $92 Average bid
    $92 Média
    10 ofertas
    Ofertar agora
    Verilog e FPGA
    Encerrado left

    Implementar um JOGO mais simples possível com apenas os leds na linguagem verilog ou vhdl... Pode ser o jogo de decorar as cores dos leds que piscam, ou campo minado com leds, qualquer jogo simples (sem gráficos VGA.. projeto super simples na linguagem verilog).

    FPGA Verilog / VHDL
    $20 Average bid
    $20 Média
    2 ofertas
    Ofertar agora
    Desenvolver um Software
    Encerrado left

    Preciso de um projeto em Verilog que gerencie o consumo de água de uma residencia.

    FPGA Verilog / VHDL
    $315 Average bid
    $315 Média
    1 ofertas
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    Veriog Tomasulo
    Encerrado left

    Neste projeto você irá utilizar Verilog para implementar o algoritmo Tomasulo de despacho simples como descrito no livro texto (Seções 3.4 e 3.5). Descrição No algoritmo Tomasulo a execução das instruções é dividida em 3 estágios: despacho, execução e write back. Esses três estágios acessam componentes críticos de hardware: o CDB, as estações de reserva (nas quais ocorrem as renomeações) e as unidades funcionais. Você deverá implementar: (1) as estações de reserva, (2) os estágios do algoritmo, (3) as unidades funcionais de multiplicação/divisão e soma/subtração, (4...

    Eletrônica FPGA Microcontrolador Verilog / VHDL
    $444 Average bid
    $444 Média
    3 ofertas
    Ofertar agora
    Ethernet UDP em FPGA e SPI em FPGA
    Encerrado left

    Preciso fazer um hardware com FPGA Altera ou Spartan da Xilinix programado em VHDL. Ele precisa receber e enviar pacotes UDP de um computador através da porta Ethernet. Eu já tenho o software que faz o envio dos pacotes UDP, hoje eu uso um hardware com FPGA Spartan III, pronto comprado da China. O hardware e o software que roda no computador são usados para controlar LEDs que utilizem drives LPD6803, WS2801, etc. O software envia os dados (frames) através de pacote UDP para o hardware (FPGA) que recebe, armazena em buffer de memoria RAM do FPGA e então envia estes dados para os LEDs através de uma porta SPI que deve ser implementada dentro do FPGA. Monitorando e capturando os pacotes UDP que o computador envia para o FPGA fica f&aa...

    Eletrônica FPGA Verilog / VHDL
    $2065 Average bid
    $2065 Média
    2 ofertas
    Ofertar agora
    Parte Operativa mips multiciclo
    Encerrado left

    ...provenientes das chaves devem ser concatenados com 24 ‘0’s para formar uma palavra de 32 bits. Os sinais de controle m1, m2, m3, wPC, wMem, wRI devem ser associados às chaves de entrada. Um arquivo comprimido com todos os módulos VHDL do MIPS multiciclo é disponibilizado no Moodle. O código MIPS a ser carregado na memória está contido no arquivo mem.mif. Para exibição dos dados nos mostradores, utilizar os acionadores de display de 7 segmentos feito na primeira aula de laboratório. Simular o circuito no ModelSim e prototipá-lo na placa DE2-70. Escrever um testbench VHDL para simulação no ModelSim realizando as seguintes tarefas: • ler o conteúdo das inst...

    Engenharia Verilog / VHDL
    $96 Average bid
    $96 Média
    3 ofertas
    Ofertar agora
    Relógio Digital em VHLD
    Encerrado left

    Preciso de código em VHDL e respectivos ficheiros de testbench para um relógio digital. No LCD deve de aparecer: Linha 1: HH:MM:SS Linha 2: Relógio PNL Horas (HH) de 00 a 23 Com possibilidade de acerto Placa com frequência de relógio de 50Mhz Placa onde irá funcionar Xilinx/ Diligent Sparten-3E Preciso do código e ficheiros de testbench até 9 de fevereiro de 2014

    Engenharia Elétrica Microcontrolador Verilog / VHDL
    $244 Average bid
    $244 Média
    1 ofertas
    Ofertar agora
    Verilog Design for 10GbE on Artix Ultrascale+
    2 dias left

    I'm seeking a skilled FPGA developer with comprehensive knowledge in Verilog and Ethernet standards. The project involves implementing a 10 Gigabit Ethernet Physical Coding Sublayer/Physical Medium Attachment (PCS/PMA) and Media Access Control (MAC) in an Artix Ultrascale+ FPGA, utilizing SFP+ ports. Key Responsibilities: - Design and implement a Verilog module for basic data transmission via 10GbE. - Ensure compatibility with Artix Ultrascale+ FPGA. - Utilize Vivado for all simulations, testing and final implementation. Ideal Candidates: - Proficient in Verilog and FPGA design, particularly with Artix Ultrascale+ series. - Extensive experience with designing Ethernet PCS/PMA and MAC layers. - Familiar with Vivado and its simulation capabilities. - Able to deliv...

    FPGA Verilog / VHDL
    $8 / hr Average bid
    $8 / hr Média
    9 ofertas
    Ofertar agora
    Zynq Board Expert Needed
    2 dias left
    Verificado

    I'm seeking a skilled professional with expertise in Zynq Board. Although I haven't specified the exact tasks, the project ideally involves a blend of hardware configuration, software development, and firmware debugging. Key requirements: - experience with Zynq Board - p required to use Vivado/verilog/vhdl. - I just need coding - Needs manual and auto triggering Deadline- 18th January 2025

    Design de Circuito Eletrônica FPGA Microcontrolador Verilog / VHDL
    $46 Average bid
    $46 Média
    12 ofertas
    Ofertar agora
    RISC-V Developers Needed for Long-term Projects
    1 dia left

    I'm seeking skilled developers for ongoing RISC-V projects. Key requirements include: - Proficiency in Assembly, Verilog, and C - Strong background in RISC-V code development and programming - Understanding of RISC-V hardware - Familiarity with Linux development is a plus This is a unique opportunity for repeat contract development on long-term projects. I welcome all applicants and promise to respond to everyone. Connect with me to discuss project specifics.

    Montagem Programação C Eletrônica Verilog / VHDL x86/x64 Assembler
    $4235 Average bid
    $4235 Média
    17 ofertas
    Ofertar agora
    DVB Packet Processor Development for iCE40 FPGA with Verilog
    Encerrado left

    Verilog Development for ICE40UP5K FPGA - DVB Packet Processing I am looking for a Verilog developer to create a DVB packet processor for the Lattice iCE40UP5K FPGA. The main task is to extract NIT packets from DVB transport streams and transmit them via serial port. Project Requirements: Develop Verilog code for Lattice iCE40UP5K FPGA Input: 8-bit parallel data with clock (DVB transport stream) Output: Serial transmission of extracted NIT packets The code must work on my custom iCE40 development board Additional Information: A reference implementation in VHDL for Xilinx XC3S50AN is available and can be used as a guide The developer will have access to the existing VHDL code Ongoing consultation and support will be required for: Code development proces...

    Eletrônica FPGA Microcontrolador Verilog / VHDL
    $809 Average bid
    $809 Média
    17 ofertas
    Ofertar agora
    Verilog Trainer Needed with Vivado Expertise
    Encerrado left

    Description: I am looking for an experienced Verilog trainer who can provide structured, hands-on training tailored to my requirements. The trainer must have expertise in Verilog and practical experience with the Vivado Design Suite. The training should cover basic and advanced topics, including working with interfaces like I2C, SPI, and UART. Requirements: Proficiency in Verilog HDL and strong knowledge of digital design concepts. Practical experience with the Vivado Design Suite for coding, simulation, synthesis, and debugging. Ability to design a comprehensive syllabus covering: Basics of Verilog and digital design fundamentals. Advanced Verilog topics (FSMs, testbenches, synthesis, and optimization). Interfaces: I2C, SPI, UART, and other common prot...

    Engenharia Elétrica Eletrônica Engenharia FPGA Verilog / VHDL
    $308 Average bid
    $308 Média
    8 ofertas
    Ofertar agora
    FPGA-Based Cryptography Key Generation System
    Encerrado left

    ...subsequent tasks such as hashing (SHA256, RIPEMD160) and address generation. Skills and Experience Needed: FPGA Development (preferably with Xilinx or Microsemi platforms, like SmartFusion2, Artix-7, or Lattice ECP5). Experience in implementing ECC algorithms in hardware (specifically secp256k1). Familiarity with Ethernet communication in FPGA designs (e.g., 1GbE MAC integration). HDL Coding (Verilog or VHDL) for cryptographic operations. Knowledge of high-performance computing techniques to achieve real-time or near-real-time processing. What We’re Looking For: Someone who can collaborate on defining the architecture of the hardware, implement key algorithms, and ensure efficient hardware utilization. Experience with hardware-software integration, especia...

    Programação C Engenharia Elétrica Eletrônica Microcontrolador Verilog / VHDL
    $495 Average bid
    $495 Média
    30 ofertas
    Ofertar agora
    AI Training Software Engineers Wanted
    Encerrado left

    ...answering questions related to computer science in order to help train AI models Evaluating and ranking code generated by AI models Examples of desirable expertise: Currently enrolled in or completed a bachelor's degree or higher in computer science at a selective institution Proficiency working with one or more of the the following languages: Java, Python, JavaScript / TypeScript, C++, Swift, and Verilog Ability to articulate complex concepts fluently in Austrian German. Excellent attention to detail, including grammar, punctuation, and style guidelines Payment: Currently, pay rates for core project work by coding experts range from USD $30 per hour. PLEASE NOTE: We collect, retain and use personal data for our professional business purposes, including notifying you of o...

    Algoritmo Programação C Programação C++ Java Python
    $84 Average bid
    $84 Média
    22 ofertas
    Ofertar agora
    Verilog Code Development for Camera Interfacing Block
    Encerrado left

    I'm in need of a synthesizable Verilog code to interface with a camera, primarily for image capture. The project should also include a comprehensive testbench to ensure functionality and reliability. To ensure the best fit for this project, it would be beneficial if you have: - Proficiency in Verilog coding - Previous experience with camera interfacing - Ability to create effective testbenches

    Eletrônica FPGA Simulation Verilog / VHDL Very-large-scale integration (VLSI)
    $146 Average bid
    $146 Média
    8 ofertas
    Ofertar agora
    FPGA-Based MCMC Mining App Development
    Encerrado left

    Hi, I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices optimized for Markov Chain Monte Carlo (MCMC) computations. These computations are integral to the

    Eletrônica FPGA Microcontrolador QlikView Verilog / VHDL
    $1054 Average bid
    $1054 Média
    9 ofertas
    Ofertar agora
    VHDL-Based Finite State Machine Design
    Encerrado left

    I'm working on a digital circuit design project focused on a finite state machine (FSM) for a lock system. I need assistance with the design and implementation using VHDL on a Basys3 FPGA board. Ideal Skills: - Proficiency in VHDL - Experience with digital circuit design - Familiarity with FSMs Key Tasks: - Design a FSM for a lock system - Implement the design using VHDL - Test the design on a Basys3 FPGA board Please provide examples of similar projects you've completed in your proposal.

    Engenharia Elétrica Eletrônica Engenharia FPGA Verilog / VHDL
    $120 Average bid
    $120 Média
    20 ofertas
    Ofertar agora
    Xilinx ISE Design Support for FPGA
    Encerrado left

    ...such as addition, subtraction, multiplication, and division. - It should be designed using a combination of combinational and sequential logic using Verilog. - **LED Patterns on FPGA**: - The LED patterns should be generated randomly. - You should have experience in creating dynamic and visually appealing patterns. - **Seven Segment Display on FPGA**: - The project involves configuring a seven segment display on the FPGA. - Your understanding of schematic design and FPGA programming will be crucial for this task. Ideal Skills and Experience: - Proficiency in Xilinx ISE Design software version 14.7. - Extensive experience in Verilog programming. - Prior experience with designing sign calculators and implementing LED patterns on FPGA. - Solid understanding of FP...

    Engenharia Elétrica Eletrônica FPGA Microcontrolador Verilog / VHDL
    $20 Average bid
    $20 Média
    7 ofertas
    Ofertar agora
    FPGA VHDL Project: Digital Alarm Clock and counter
    Encerrado left

    I'm seeking an FPGA expert proficient in VHDL for a multi-part project. The centerpiece is a digital alarm clock displayed on an LCD, with the following tasks to be completed: 1) A counter that counts from 0000-9999. It should be able to reset and be controlled using a pushbutton, displaying in decimal on 7-segment displays. 2) A digital alarm clock. The clock should display on an LCD and turn on an LED when the current time matches the alarm time. 3) Generation of a waveform. 4) Configuration of pins. 5) A demo video of the completed project. The digital alarm clock is the highest priority, so experience with time-based VHDL projects will be advantageous. Please note, the digital alarm clock does not need to include additional features such as a snooze function or mul...

    Engenharia Elétrica Eletrônica FPGA Microcontrolador Verilog / VHDL
    $48 Average bid
    $48 Média
    10 ofertas
    Ofertar agora
    Custom Hardware Accelerator FPGA Design
    Encerrado left

    I'm seeking an expert FPGA designer with Verilog proficiency to develop a custom hardware accelerator. Key Responsibilities: - Design an FPGA-based hardware accelerator specifically for managing sequential DMA reads and writes for memory access (TRBs). - Implement this using Verilog. Requirements: - Extensive experience with Xilinx FPGA family. - Proficiency in Verilog. - Prior work in designing custom hardware accelerators. - Knowledge in handling DMA operations. - Ability to translate complex hardware functions into Verilog code. The goal of this project is to create an efficient, reliable hardware solution that can handle specific memory access tasks with optimal performance.

    Engenharia Elétrica Eletrônica FPGA Microcontrolador Verilog / VHDL
    $126 Average bid
    $126 Média
    3 ofertas
    Ofertar agora
    VHDL Simulation of Sequential Logic Circuits
    Encerrado left

    I'm in need of a professional who can assist me with simulating sequential logic circuits, specifically flip-flops and latches, using VHDL. Key Responsibilities: - Simulate sequential logic circuits using VHDL - Focus on flip-flops and latches Ideal Skills: - Proficiency in VHDL - Experience with simulating sequential logic circuits - Understanding of flip-flops and latches Your expertise will be pivotal in ensuring the successful simulation of these circuits. Looking forward to your proposals.

    Engenharia Elétrica Eletrônica Engenharia FPGA Verilog / VHDL
    $120 Average bid
    $120 Média
    13 ofertas
    Ofertar agora
    Computer Architecture Expert Needed
    Encerrado left

    I am looking for a professional with extensive knowledge in computer architecture to assist with an upcoming project. The ideal candidate should have a strong background in processor design, memory hierarchy, and I/O systems. Experience with performance optimizatio...performance optimization, power efficiency, and scalability is a plus. Key Skills & Experience: - Extensive knowledge in computer architecture - Strong background in processor design, memory hierarchy, and I/O systems - Experience with performance optimization, power efficiency, and scalability - Proficiency in simulation or modeling tools related to computer architecture. - Proficiency in VHDL/Verilog for hardware design. Deliverable is a comprehensive technical report. The main objective is to create a v...

    Engenharia Elétrica Eletrônica Engenharia Microcontrolador Verilog / VHDL
    $178 Average bid
    $178 Média
    10 ofertas
    Ofertar agora
    Single-lane Bidirectional Differential Link for Xilinx FPGAs
    Encerrado left

    I need an expert to create a single lane bidirectional differential sender/receiver that connects two Xilinx FPGAs. Key Requirements: - The main purpose of this connection is data transfer between the two FPGAs. - The target data transfer rate is up to 1 Gbps (typ. 500 MBaud in DDR fashion) Ideal Skills: - Proficiency in FPGA programming, particul...two Xilinx FPGAs. Key Requirements: - The main purpose of this connection is data transfer between the two FPGAs. - The target data transfer rate is up to 1 Gbps (typ. 500 MBaud in DDR fashion) Ideal Skills: - Proficiency in FPGA programming, particularly with Xilinx FPGAs. - Familiarity with the SerDes, IO-Delay, clocking archtecture of Spartan-6 - Language: VHDL Please do not post any suggestions unless you have experience in ...

    FPGA Verilog / VHDL
    $17 / hr Average bid
    $17 / hr Média
    2 ofertas
    Ofertar agora
    Invigorating Tech Education Freelance Trainers Wanted!
    Encerrado left

    ...Python/Java, JPA, JWT, and MySQL. ⿣ Bootstrap & Power BI Merge design and data for visually stunning insights. ⿤ Embedded Systems Work with TI Boards, STM controllers, Linux, and cutting-edge embedded tech. ⿥ Cloud Computing Teach AWS, Python, Terraform, and cloud-first solutions. ⿦ Blockchain Be the guide to secure, decentralized future technologies. ⿧ VLSI Design & Verification Lead with expertise in Verilog, SystemVerilog, and UVM. ⿨ VLSI Design for Test (DFT) Shape the semiconductor field with Scan BIST, MBIST, and ATPG. Location: Tamil Nadu(Ready to travel and stay all over TN) and Andhra pradesh Why Join Us? Flexible freelance opportunities Shape the future of engineering talent Collaborate with a forward-thinking team Let’s build something extraordinary, to...

    Hadoop Java Linux MySQL Python
    $43 Average bid
    $43 Média
    9 ofertas
    Ofertar agora
    FPGA AMD Alveo™ U50 APP Development1a
    Encerrado left

    I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices

    Inteligência Artificial FPGA FPGA Coding Verilog / VHDL
    $764 Average bid
    $764 Média
    7 ofertas
    Ofertar agora
    Experienced ASIC/FPGA Designer and Technological Lead
    Encerrado left

    Spyglas,VCS,DC,DFT,Verdi,Catapult,Synplify,VerilogXL,Virtuoso,Xcelium,Spectre,Allegro,Vivado,Quartus,ModleSim, Matlab,Octave,Signal Generator,Logic Analyzer,Anaconda,Tensorflow,Keras,Darknet ,notepad++. Language mastery: Verilog,SystemVerilog,UVM,C,C++,VHDL,Python,Firmware etc. Familiar with using: Linux, Windows,Unix,MS-DOS,FreeRTOS. PreviousFields: AISC/IP/IC design,SOC design/verification,FPGA Design/Verification and debugging,AI (especially deep learning),complex digital systems,complex communication systems,mixed digital and analog systems. Work experience focused in Beijing China 5+ years of ASIC experience and 10+ years of FPGA experience, experienced Senior Technical Lead with a demonstrated history of working in the semiconductors industry. Part of 5+ tap...

    Programação C Engenharia Elétrica Eletrônica Microcontrolador Verilog / VHDL
    $40 / hr Average bid
    $40 / hr Média
    19 ofertas
    Ofertar agora
    Tech Education Freelance Trainers Needed -- 2
    Encerrado left

    ...JWT, and MySQL. 3️⃣ Bootstrap & Power BI Merge design and data for visually stunning insights. 4️⃣ Embedded Systems Work with TI Boards, STM controllers, Linux, and cutting-edge embedded tech. 5️⃣ Cloud Computing Teach AWS, Python, Terraform, and cloud-first solutions. 6️⃣ Blockchain Be the guide to secure, decentralized future technologies. 7️⃣ VLSI Design & Verification Lead with expertise in Verilog, SystemVerilog, and UVM. 8️⃣ VLSI Design for Test (DFT) Shape the semiconductor field with Scan BIST, MBIST, and ATPG. ? Location: Tamil Nadu(Ready to travel and stay all over TN) and Andhra pradesh ? Why Join Us? Flexible freelance opportunities Shape the future of engineering talent Collaborate with a forward-thinking team ? Let’s build something extraordinary, to...

    Blockchain Java Python STM32 Verilog / VHDL
    $51 Average bid
    $51 Média
    7 ofertas
    Ofertar agora
    FPGA VHDL Design
    Encerrado left

    The company is seeking FPGA Designers proficient in VHDL to outsource specific tasks. Some tasks will require a remote server connection for accessing resources and collaborative development. Skills Required: Proficiency in VHDL for FPGA design and development. Experience with simulators such as ModelSim or Active-HDL/Riviera. Additional Skills (Considered a Plus): Expertise in synthesis and implementation processes. Proficiency in Tcl scripting for automation and tool customization. Experience with debugging and testing using tools like ILA (Integrated Logic Analyzer), SignalTap, or similar. Familiarity with embedded software development, including: Writing bare-metal C/C++ for testing Zynq firmware. Developing or customizing a complete PetaLinux OS. Soft Skills: Stro...

    Programação C Engenharia Elétrica Eletrônica FPGA Verilog / VHDL
    $21 / hr Average bid
    $21 / hr Média
    19 ofertas
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    UART Communication & Verilog Debugging Expert
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    I'm looking for an experienced professional to help debug my Verilog code, Xilinx Vivado, FPGA; specifically focusing on UART communication related to data transmission. I'm currently at the final testing stage and encountering issues with incorrect data output. Key Requirements: - Expertise in UART communication, particularly in data transmission - Proficiency in Verilog coding - Experience in debugging and troubleshooting Verilog code - Ability to identify and resolve issues causing incorrect data output - Familiarity with simulation software such as ModelSim or Vivado

    Engenharia Elétrica Eletrônica Microcontrolador Verilog / VHDL
    $48 / hr Average bid
    $48 / hr Média
    14 ofertas
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    IR Drop Analysis for RFID Mutual Authentication Protocol
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    Title of the Article: IR Drop Analysis for RFID Mutual Authentication Protocol This article focuses on the complete process of laying out a Verilog code design using Astro and performing IR Drop analysis. It also discusses methods to reduce IR Drop. The Verilog code is divided into seven parts: one top module and six submodules. The tasks include: Layout Process: Perform the layout of the entire Verilog code using Astro. Floorplan and Chip Physical Implementation: Cover the chip’s physical design and implementation steps. IR Drop Analysis: Conduct full-chip static and dynamic IR Drop analysis at various stages of the physical implementation process using simulation results to identify hotspot regions. Optimization Methods: Analyze the causes of IR Drop h...

    Engenharia Elétrica Electronic Design Eletrônica Engenharia Verilog / VHDL
    $98 Average bid
    $98 Média
    3 ofertas
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    Technical Document Creation on VLSI Digital Design
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    I'm seeking a skilled technical writer with a strong background in VLSI digital design to create an educational document aimed at intermediate learners. The document should focus on HDL (Verilog/VHDL) and provide clear, comprehensive explanations of the concepts, techniques, and applications pertinent to this area of digital design. Key Requirements: - In-depth knowledge and experience in VLSI digital design and HDL (Verilog/VHDL). - Proven technical writing skills, particularly in creating educational materials. - Ability to explain complex concepts in an accessible way for intermediate learners. The final document should be well-structured, engaging, and suitable for use as a teaching resource. The document should be between 25-50 pages.

    Engenharia Elétrica Eletrônica Engenharia Redação técnica Verilog / VHDL
    $152 Average bid
    $152 Média
    15 ofertas
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    Low power 5-Port NoC Router for IoT edge devices in Verilog
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    I'm looking for a skilled engineer to develop a 5-port Network on Chip (NoC) router for IoT edge devices. This router should be coded in Verilog and be designed with low power consumption as the top priority. The router should handle 8-bit input data and be optimized for low power operation without compromising performance. Key Requirements: - Proficiency in Verilog with proven experience in coding for hardware implementations. - Deep understanding of low power design techniques in digital circuits. - Experience with designing network routers, particularly for IoT applications. - Capability to optimize for specific traffic patterns - in this case, handling 8-bit input data. If you have the required skills and experience, I look forward to receiving your bid.

    Engenharia Elétrica Eletrônica Engenharia Microcontrolador Verilog / VHDL
    $93 Average bid
    $93 Média
    2 ofertas
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    FPGA AMD Alveo™ U50 APP Development2
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    I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices

    Inteligência Artificial FPGA FPGA Coding Verilog / VHDL
    $472 Average bid
    $472 Média
    8 ofertas
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    altera DE2-115에 교통 신호 컨트롤러 구현
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    I am seeking a freelancer to implement a traffic signal controller using the Altera DE2-115 board. The project is intended for educational demonstration purposes, so clear and effective design is crucial. Key Requirements: - Use of Verilog to program the board. - Implementation of a fixed-time sequence traffic signal pattern. - Inclusion of pedestrian crossing signals, which should be activated via the board's key button. - Utilization of the board's LCD screen to display the current signal state. Ideal Skills: - Proficiency in Verilog programming. - Experience with the Altera DE2-115 board. - Understanding of traffic signal patterns and controllers. - Ability to design for educational purposes.

    Engenharia Elétrica Eletrônica FPGA Microcontrolador Verilog / VHDL
    $30 Average bid
    $30 Média
    6 ofertas
    Ofertar agora
    FPGA AMD Alveo™ U50 APP Development1
    Encerrado left

    I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices

    Inteligência Artificial FPGA FPGA Coding Verilog / VHDL
    $496 Average bid
    $496 Média
    6 ofertas
    Ofertar agora
    FPGA AMD Alveo™ U50 APP Development
    Encerrado left

    I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices

    Inteligência Artificial FPGA FPGA Coding Verilog / VHDL
    $485 Average bid
    $485 Média
    5 ofertas
    Ofertar agora
    ASIC-based ALU for 16-bit BCD Arithmetic - 23/11/2024 15:17 EST
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    I'm looking for a skilled engineer to design and implement an Arithmetic Logic Unit (ALU) using Verilog. This ALU will perform addition and subtraction of 16-bit Binary Coded Decimal (BCD) numbers on an ASIC platform. Key Requirements: - Design and implement the ALU to handle 16-bit BCD numbers. - Use Verilog for all design aspects. Ideal Skills: - Extensive experience with ASIC design and implementation. - Proficient in Verilog with a solid understanding of ALU design. - Knowledge of Binary Coded Decimal (BCD) arithmetic. The successful freelancer will help bring this project to fruition with their expertise in digital design and ASICs. The ALU should operate at a clock frequency of no requirements.

    Engenharia Elétrica Eletrônica Engenharia FPGA Verilog / VHDL
    $142 Average bid
    Urgente
    $142 Média
    5 ofertas
    Ofertar agora
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