RTL-Repo: A Benchmark for Evaluating LLMs on Large-Scale RTL Design Projects - IEEE LAD'24
-
Updated
Jun 5, 2024 - Python
#
rtl-design
Here are 2 public repositories matching this topic...
📦 Tool to enable package managing for HDL VIP or IP cores (Verilog, SystemVerilog, VHDL) using Python pip
-
Updated
Jan 26, 2024 - Python
Improve this page
Add a description, image, and links to the rtl-design topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the rtl-design topic, visit your repo's landing page and select "manage topics."