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STM32H7B0VBTX board variant added to the boards #2387
STM32H7B0VBTX board variant added to the boards #2387
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I added this variant and tested everyhing works like expected for STM32H7B0VBT. I tested specificly for STM32H7B0VBT in my project but I added the other boards like in Add a new vatiant wiki. Please update the wiki the memory part should not updated like in wiki otherwise it is not working because of cortex m7 it need partial memories.
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Hi @Aurentiaco35
Thanks for the PR.
About the Size in linker script, it should simply refers to the one defined in the boards.txt.
Then all generic variants have the correct value and can benefit of the offset feature.
In the boards.txt, the value of the RAM have to be updated to match the correct size used for Arduino, mainly when it is not contiguous.
The wiki, show a simple use case where only 1 FLASH and 1 RAM section are described.
Even the linker script can be updated, for example when RAM's are contiguous then only one with the full size can be defined.
variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/ldscript.ld
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variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/ldscript.ld
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variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/generic_clock.c
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variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/generic_clock.c
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variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/generic_clock.c
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Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
…t.ld Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
…t.ld Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
…_clock.c Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
…_clock.c Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
…_clock.c Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
I commited these suggestions. Thank you for your help. |
I added space character as it in the test error Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
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LGTM
I couldn't understand in that linkintor which part should I update? |
Nothing. The url probably down during the test. |
So what should I do next is there anything that I can do? When you are going to merge and we will see these boards in IDE? |
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Please fix the last issue and squash all commit in one.
And don't worry, I will merge it when last changes performed then it will be available within next release 2.8.0. |
Signed-off-by: Aurentiaco35 <140486360+Aurentiaco35@users.noreply.github.com>
Thank you for your info. And sorry about it. I missed that now I commit it. Thank you again. |
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LGTM.
I added this variant and tested everyhing works like expected for STM32H7B0VBT. I tested specificly for STM32H7B0VBT in my project but I added the other boards like in Add a new vatiant wiki. Please update the wiki the memory part should not updated like in wiki otherwise it is not working because of cortex m7 it need partial memories.