According to the ESP32-S3 technical reference manual, SRST is high-active. This PR will

• trigger a JTAG reset when asserting reset (instead of while deasserting)
• correct the SRST levels so deasserting now pulls the MCU out of reset instead of triggering it

SRST is connected to the reset logic of the digital circuitry in the SoC and a high level on this line
will cause a digital system reset. Note that the USB Serial/JTAG Controller itself is not affected by SRST.

I'm not sure if attach under reset was used for ESP32-Cx devices or if it worked, but the current esp-usbjtag implementation doesn't seem to be correct in this regard.