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winch(arm64): and, or, xor, shifts #8921

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merged 10 commits into from
Jul 16, 2024
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evacchi
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@evacchi evacchi commented Jul 9, 2024

Follow up to #8321.

Adds support to binary and, binary or, binary xor (eor), shl, shrS, shrU, rotr, rotl.

evacchi and others added 6 commits July 9, 2024 15:56
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
@evacchi evacchi requested review from a team as code owners July 9, 2024 14:10
@evacchi evacchi requested review from abrown and alexcrichton and removed request for a team July 9, 2024 14:10
@evacchi evacchi changed the title Winch bops winch(arm64): and, or, xor, shifts Jul 9, 2024
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I'll take a look at this one.

@alexcrichton alexcrichton requested review from saulecabrera and removed request for abrown and alexcrichton July 9, 2024 14:19
winch/codegen/src/isa/aarch64/masm.rs Outdated Show resolved Hide resolved
Comment on lines 32 to 43
impl Into<ALUOp> for ShiftKind {
fn into(self) -> ALUOp {
match self {
ShiftKind::Shl => ALUOp::Lsl,
ShiftKind::ShrS => ALUOp::Asr,
ShiftKind::ShrU => ALUOp::Lsr,
ShiftKind::Rotr => ALUOp::RotR,
// Rotl is implemented as neg+ROR.
ShiftKind::Rotl => unimplemented!(),
}
}
}
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Given that this operation can fail, maybe we should avoid implementing Into/From and instead create a helper method in the Assembler itself, by extracting:

let shift_op: ALUOp = if kind == ShiftKind::Rotl {
            // Emulate Rotr with rm := neg(rm); with neg(x) := sub(zero, x).
            self.emit_alu_rrr(ALUOp::Sub, regs::zero(), rn, rn, size);
            ALUOp::RotR
        } else {
            kind.into()
        };

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refactored and moved to shift_kind_to_alu_op()

winch/codegen/src/masm.rs Outdated Show resolved Hide resolved
evacchi added 2 commits July 11, 2024 22:08
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
@evacchi evacchi requested a review from saulecabrera July 12, 2024 22:04
evacchi and others added 2 commits July 13, 2024 00:05
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
This commit includes very minor clean-ups, these are mechanical changes
only.

* Rename `shift_rr` to `shift`, as we're still passing the context in,
  the callee can decide what to do with the instruction arguments.

* Delete the un-used `Into<AluOp> for ShiftKind`
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This looks good to me, thanks!

For visibility, here's a recap of an offline discussion between @evacchi and myself:

  • @evacchi is on PTO for the next couple of weeks and therefore suggested pushing any required changes on top of this PR in order to take it to the finish line.
  • I pushed e18681c, which is a mechanical change only.

Given the recent changes I was thinking it might make sense to get a second review on this change.

@elliottt, would you be able to provide a second pass on this change?

@saulecabrera saulecabrera requested a review from elliottt July 16, 2024 13:54
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This looks good to me as well!

@elliottt elliottt added this pull request to the merge queue Jul 16, 2024
Merged via the queue into bytecodealliance:main with commit c69ab34 Jul 16, 2024
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evacchi commented Jul 17, 2024

Wonderful thanks for pushing this to the finish line!! ❤️❤️

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3 participants