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cpu/riscv: Add PMP driver #19712

Merged
merged 1 commit into from
Jun 29, 2023
Merged

cpu/riscv: Add PMP driver #19712

merged 1 commit into from
Jun 29, 2023

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Teufelchen1
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@Teufelchen1 Teufelchen1 commented Jun 6, 2023

Contribution description

Hi! 🐘

this adds a basic RISC-V physical memory protection (PMP) driver to RIOT. Well, 'driver' might be a stretched, feels more like a little utility :)

EDIT: Also added a no-execute RAM option for the hifive & a corresponding test

Since I only have an Hifive rev b, it's only enabled on this board / cpu. I also tested the code on an ESP32-C but the feature can't be enabled there, as cpu/riscv_common/ is not used by the ESP32...

Testing procedure

  • Grab a hifive rev b
  • go to examples/hello-world
  • Add USEMODULES += periph_pmp to the Makefile
  • Include pmp.h in main.c
  • Add code e.g. print_pmpcfg(0);
  • compile & flash & term

You should see something like this:

# Hello World!
# You are running RIOT on a(n) hifive1b board.
# This board features a(n) fe310 MCU.
# pmp00cfg: - R-X OFF   0x00000000 - 0x00000000

@github-actions github-actions bot added Area: cpu Area: CPU/MCU ports Platform: RISC-V Platform: This PR/issue effects RISC-V-based platforms labels Jun 6, 2023
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Not perfect yet! 😅

cpu/fe310/include/cpu_conf.h Outdated Show resolved Hide resolved
cpu/riscv_common/include/pmp.h Outdated Show resolved Hide resolved
cpu/riscv_common/include/pmp.h Outdated Show resolved Hide resolved
cpu/riscv_common/include/pmp.h Outdated Show resolved Hide resolved
cpu/riscv_common/periph/pmp.c Show resolved Hide resolved
@Teufelchen1 Teufelchen1 force-pushed the feat/pmpdriver branch 3 times, most recently from 7cdcabc to 3903ec3 Compare June 9, 2023 09:58
@benpicco benpicco added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label Jun 9, 2023
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benpicco commented Jun 9, 2023

Can you add a test application to show/verify how this works?

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Teufelchen1 commented Jun 9, 2023

I can if you insist. Otherwise, the test coverage will be provided in the near future by employing PMP for e.g. no-execute RAM. Similar to how the MPU on ARM Cortex is being tested.

Also, completely forgot about Kconfig 😵‍💫

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riot-ci commented Jun 9, 2023

Murdock results

✔️ PASSED

0e83965 cpu/riscv: Add PMP driver

Success Failures Total Runtime
6931 0 6931 10m:46s

Artifacts

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benpicco commented Jun 9, 2023

Ah if this can be covered by the same test as MPU on ARM even better!

@github-actions github-actions bot added Area: build system Area: Build system Area: core Area: RIOT kernel. Handle PRs marked with this with care! Area: doc Area: Documentation Area: tests Area: tests and testing framework labels Jun 12, 2023
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The no-execute RAM integration ended up being simpler than expected. I added a commit that also features a test.

I think this is done now. One final review please 😄

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Just some small comments

cpu/fe310/cpu.c Outdated Show resolved Hide resolved
cpu/riscv_common/irq_arch.c Outdated Show resolved Hide resolved
tests/cpu/pmp_noexec_ram/main.c Show resolved Hide resolved
@Teufelchen1 Teufelchen1 force-pushed the feat/pmpdriver branch 2 times, most recently from e4e4ec6 to a92bfd3 Compare June 21, 2023 13:03
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Ping @benpicco

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@MrKevinWeiss MrKevinWeiss left a comment

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Looks good, I would add a comment in code about the switch case. If nobody objects I would ok merging tomorrow or so.

@@ -37,13 +37,13 @@ typedef enum {
PANIC_HARD_REBOOT,
PANIC_ASSERT_FAIL,
PANIC_EXPECT_FAIL,
PANIC_MEM_MANAGE, /**< memory management fault */
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Makes sense to move it to expose it in a common way. As long as nobody actually depends on this number or the next few potential codes (which would be platform specific anyways).

It is ok for me but should be considered.

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bors merge

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bors bot commented Jun 29, 2023

Build succeeded!

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@bors bors bot merged commit 755442f into RIOT-OS:master Jun 29, 2023
@benpicco benpicco added this to the Release 2023.07 milestone Aug 2, 2023
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Area: build system Area: Build system Area: core Area: RIOT kernel. Handle PRs marked with this with care! Area: cpu Area: CPU/MCU ports Area: doc Area: Documentation Area: Kconfig Area: Kconfig integration Area: tests Area: tests and testing framework CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Platform: RISC-V Platform: This PR/issue effects RISC-V-based platforms
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5 participants