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cpu/riscv: Add PMP driver #19712
cpu/riscv: Add PMP driver #19712
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Not perfect yet! 😅
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Can you add a test application to show/verify how this works? |
I can if you insist. Otherwise, the test coverage will be provided in the near future by employing PMP for e.g. no-execute RAM. Similar to how the MPU on ARM Cortex is being tested. Also, completely forgot about Kconfig 😵💫 |
Ah if this can be covered by the same test as MPU on ARM even better! |
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The no-execute RAM integration ended up being simpler than expected. I added a commit that also features a test. I think this is done now. One final review please 😄 |
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Just some small comments
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Ping @benpicco |
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Looks good, I would add a comment in code about the switch case. If nobody objects I would ok merging tomorrow or so.
@@ -37,13 +37,13 @@ typedef enum { | |||
PANIC_HARD_REBOOT, | |||
PANIC_ASSERT_FAIL, | |||
PANIC_EXPECT_FAIL, | |||
PANIC_MEM_MANAGE, /**< memory management fault */ |
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Makes sense to move it to expose it in a common way. As long as nobody actually depends on this number or the next few potential codes (which would be platform specific anyways).
It is ok for me but should be considered.
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bors merge |
Build succeeded! The publicly hosted instance of bors-ng is deprecated and will go away soon. If you want to self-host your own instance, instructions are here. If you want to switch to GitHub's built-in merge queue, visit their help page. |
Contribution description
Hi! 🐘
this adds a basic RISC-V physical memory protection (PMP) driver to RIOT. Well, 'driver' might be a stretched, feels more like a little utility :)
EDIT: Also added a no-execute RAM option for the hifive & a corresponding test
Since I only have an Hifive rev b, it's only enabled on this board / cpu. I also tested the code on an ESP32-C but the feature can't be enabled there, as
cpu/riscv_common/
is not used by the ESP32...Testing procedure
examples/hello-world
USEMODULES += periph_pmp
to theMakefile
pmp.h
inmain.c
print_pmpcfg(0);
You should see something like this: