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boards/nucleo-f429zi: Provide 2nd timer #19447
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Would this change also be valid for |
}, | ||
{ | ||
.dev = TIM5, | ||
.max = 0xffffffff, |
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Is there any reason for the sorting?
If TIM5 is always available and always 32bit, it should be the first in the array, to trickle down as default for ztimer_used.
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At least on the L4 it indeed seems to be available and 32 bit. I will swap the two.
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Should have looked more closely. The exceptions are L0 and L1 where TIM2 is not 32 bit, not all STM32L families. Let me check for those as well.
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RIOT/boards/nucleo-l152re/doc.txt
Line 29 in 1961274
| Timers | 12 (8x 16-bit, 1x 32-bit [TIM5], 1x Systick, 2x watchdog) | |
Yep, at least on STM32L1 the sorting helps ztimer
Likely, but I don't have the hardware to test. I intentionally split out the timer config as separate header file so that using it for other boards is a one-line-diff PR. |
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Maybe I should also call the file tim5_and_tim2 then with the new sorting |
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This adds a common configuration file that provides two periph timers using TIM5 and TIM2.
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CI is hopefully happy now :) |
I could test it, I have the hardware. But since |
All seems to be green :) |
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bors merge
Build succeeded: |
Thx :) |
Contribution description
nucleo-f429zi
Testing procedure
E.g.
tests/periph_timer
, but also grepping for TIM2 and TIM5 inboards/nucleo-f429zi/include/periph_conf.h
to detect any conflict e.g. between PWM and timer config.Issues/PRs references
None