Some usefull python scripts to works with Chisel, Verilog, cocotb, smtbmc, ...

Each following software are standalone python package. To install it just go to directory and do :

$ python -m pip install -e .

Executable have the name of chapter software.

Quick and Dirty python script to add timescale and vcd in verilog module generated by chisel backend

Inject somes SystemVerilog assert/assume under verilog chisel generated module.

Generate cocotb testbench files for a Chisel Module specified in argument

Delete useless formal code generated by chisel-formal trait in pure verilog file