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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
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Pull networking updates from David Miller:

 1) BBR TCP congestion control, from Neal Cardwell, Yuchung Cheng and
    co. at Google. https://lwn.net/Articles/701165/

 2) Do TCP Small Queues for retransmits, from Eric Dumazet.

 3) Support collect_md mode for all IPV4 and IPV6 tunnels, from Alexei
    Starovoitov.

 4) Allow cls_flower to classify packets in ip tunnels, from Amir Vadai.

 5) Support DSA tagging in older mv88e6xxx switches, from Andrew Lunn.

 6) Support GMAC protocol in iwlwifi mwm, from Ayala Beker.

 7) Support ndo_poll_controller in mlx5, from Calvin Owens.

 8) Move VRF processing to an output hook and allow l3mdev to be
    loopback, from David Ahern.

 9) Support SOCK_DESTROY for UDP sockets. Also from David Ahern.

10) Congestion control in RXRPC, from David Howells.

11) Support geneve RX offload in ixgbe, from Emil Tantilov.

12) When hitting pressure for new incoming TCP data SKBs, perform a
    partial rathern than a full purge of the OFO queue (which could be
    huge). From Eric Dumazet.

13) Convert XFRM state and policy lookups to RCU, from Florian Westphal.

14) Support RX network flow classification to igb, from Gangfeng Huang.

15) Hardware offloading of eBPF in nfp driver, from Jakub Kicinski.

16) New skbmod packet action, from Jamal Hadi Salim.

17) Remove some inefficiencies in snmp proc output, from Jia He.

18) Add FIB notifications to properly propagate route changes to
    hardware which is doing forwarding offloading. From Jiri Pirko.

19) New dsa driver for qca8xxx chips, from John Crispin.

20) Implement RFC7559 ipv6 router solicitation backoff, from Maciej
    Żenczykowski.

21) Add L3 mode to ipvlan, from Mahesh Bandewar.

22) Support 802.1ad in mlx4, from Moshe Shemesh.

23) Support hardware LRO in mediatek driver, from Nelson Chang.

24) Add TC offloading to mlx5, from Or Gerlitz.

25) Convert various drivers to ethtool ksettings interfaces, from
    Philippe Reynes.

26) TX max rate limiting for cxgb4, from Rahul Lakkireddy.

27) NAPI support for ath10k, from Rajkumar Manoharan.

28) Support XDP in mlx5, from Rana Shahout and Saeed Mahameed.

29) UDP replicast support in TIPC, from Richard Alpe.

30) Per-queue statistics for qed driver, from Sudarsana Reddy Kalluru.

31) Support BQL in thunderx driver, from Sunil Goutham.

32) TSO support in alx driver, from Tobias Regnery.

33) Add stream parser engine and use it in kcm.

34) Support async DHCP replies in ipconfig module, from Uwe
    Kleine-König.

35) DSA port fast aging for mv88e6xxx driver, from Vivien Didelot.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1715 commits)
  mlxsw: switchx2: Fix misuse of hard_header_len
  mlxsw: spectrum: Fix misuse of hard_header_len
  net/faraday: Stop NCSI device on shutdown
  net/ncsi: Introduce ncsi_stop_dev()
  net/ncsi: Rework the channel monitoring
  net/ncsi: Allow to extend NCSI request properties
  net/ncsi: Rework request index allocation
  net/ncsi: Don't probe on the reserved channel ID (0x1f)
  net/ncsi: Introduce NCSI_RESERVED_CHANNEL
  net/ncsi: Avoid unused-value build warning from ia64-linux-gcc
  net: Add netdev all_adj_list refcnt propagation to fix panic
  net: phy: Add Edge-rate driver for Microsemi PHYs.
  vmxnet3: Wake queue from reset work
  i40e: avoid NULL pointer dereference and recursive errors on early PCI error
  qed: Add RoCE ll2 & GSI support
  qed: Add support for memory registeration verbs
  qed: Add support for QP verbs
  qed: PD,PKEY and CQ verb support
  qed: Add support for RoCE hw init
  qede: Add qedr framework
  ...
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torvalds committed Oct 5, 2016
2 parents 3ddf40e + 03a1eab commit 687ee0a
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3 changes: 3 additions & 0 deletions Documentation/devicetree/bindings/net/apm-xgene-enet.txt
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Expand Up @@ -47,6 +47,9 @@ Optional properties:
Valid values are between 0 to 7, that maps to
273, 589, 899, 1222, 1480, 1806, 2147, 2464 ps
Default value is 2, which corresponds to 899 ps
- rxlos-gpios: Input gpio from SFP+ module to indicate availability of
incoming signal.


Example:
menetclk: menetclk {
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45 changes: 44 additions & 1 deletion Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt
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Expand Up @@ -6,9 +6,13 @@ Required properties:
- reg: addresses and length of the register sets for the device, must be 6
pairs of register addresses and lengths
- interrupts: interrupts for the devices, must be two interrupts
- #address-cells: must be 1, see dsa/dsa.txt
- #size-cells: must be 0, see dsa/dsa.txt

Deprecated binding required properties:

- dsa,mii-bus: phandle to the MDIO bus controller, see dsa/dsa.txt
- dsa,ethernet: phandle to the CPU network interface controller, see dsa/dsa.txt
- #size-cells: must be 0
- #address-cells: must be 2, see dsa/dsa.txt

Subnodes:
Expand Down Expand Up @@ -39,6 +43,45 @@ Optional properties:

Example:

switch_top@f0b00000 {
compatible = "simple-bus";
#size-cells = <1>;
#address-cells = <1>;
ranges = <0 0xf0b00000 0x40804>;

ethernet_switch@0 {
compatible = "brcm,bcm7445-switch-v4.0";
#size-cells = <0>;
#address-cells = <1>;
reg = <0x0 0x40000
0x40000 0x110
0x40340 0x30
0x40380 0x30
0x40400 0x34
0x40600 0x208>;
reg-names = "core", "reg", intrl2_0", "intrl2_1",
"fcb, "acb";
interrupts = <0 0x18 0
0 0x19 0>;
brcm,num-gphy = <1>;
brcm,num-rgmii-ports = <2>;
brcm,fcb-pause-override;
brcm,acb-packets-inflight;

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
label = "gphy";
reg = <0>;
};
};
};
};

Example using the old DSA DeviceTree binding:

switch_top@f0b00000 {
compatible = "simple-bus";
#size-cells = <1>;
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89 changes: 89 additions & 0 deletions Documentation/devicetree/bindings/net/dsa/qca8k.txt
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@@ -0,0 +1,89 @@
* Qualcomm Atheros QCA8xxx switch family

Required properties:

- compatible: should be "qca,qca8337"
- #size-cells: must be 0
- #address-cells: must be 1

Subnodes:

The integrated switch subnode should be specified according to the binding
described in dsa/dsa.txt. As the QCA8K switches do not have a N:N mapping of
port and PHY id, each subnode describing a port needs to have a valid phandle
referencing the internal PHY connected to it. The CPU port of this switch is
always port 0.

Example:


&mdio0 {
phy_port1: phy@0 {
reg = <0>;
};

phy_port2: phy@1 {
reg = <1>;
};

phy_port3: phy@2 {
reg = <2>;
};

phy_port4: phy@3 {
reg = <3>;
};

phy_port5: phy@4 {
reg = <4>;
};

switch0@0 {
compatible = "qca,qca8337";
#address-cells = <1>;
#size-cells = <0>;

reg = <0>;

ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "cpu";
ethernet = <&gmac1>;
phy-mode = "rgmii";
};

port@1 {
reg = <1>;
label = "lan1";
phy-handle = <&phy_port1>;
};

port@2 {
reg = <2>;
label = "lan2";
phy-handle = <&phy_port2>;
};

port@3 {
reg = <3>;
label = "lan3";
phy-handle = <&phy_port3>;
};

port@4 {
reg = <4>;
label = "lan4";
phy-handle = <&phy_port4>;
};

port@5 {
reg = <5>;
label = "wan";
phy-handle = <&phy_port5>;
};
};
};
};
4 changes: 2 additions & 2 deletions Documentation/devicetree/bindings/net/ethernet.txt
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Expand Up @@ -11,8 +11,8 @@ The following properties are common to the Ethernet controllers:
the maximum frame size (there's contradiction in ePAPR).
- phy-mode: string, operation mode of the PHY interface; supported values are
"mii", "gmii", "sgmii", "qsgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id",
"rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto
standard property;
"rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii", "trgmii"; this is now a
de-facto standard property;
- phy-connection-type: the same as "phy-mode" property but described in ePAPR;
- phy-handle: phandle, specifies a reference to a node representing a PHY
device; this property is described in ePAPR and so preferred;
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1 change: 1 addition & 0 deletions Documentation/devicetree/bindings/net/macb.txt
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Expand Up @@ -21,6 +21,7 @@ Required properties:
- clock-names: Tuple listing input clock names.
Required elements: 'pclk', 'hclk'
Optional elements: 'tx_clk'
Optional elements: 'rx_clk' applies to cdns,zynqmp-gem
- clocks: Phandles to input clocks.

Optional properties for PHY child node:
Expand Down
8 changes: 6 additions & 2 deletions Documentation/devicetree/bindings/net/mediatek-net.txt
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Expand Up @@ -24,14 +24,17 @@ Required properties:
Optional properties:
- interrupt-parent: Should be the phandle for the interrupt controller
that services interrupts for this device

- mediatek,hwlro: the capability if the hardware supports LRO functions

* Ethernet MAC node

Required properties:
- compatible: Should be "mediatek,eth-mac"
- reg: The number of the MAC
- phy-handle: see ethernet.txt file in the same directory.
- phy-handle: see ethernet.txt file in the same directory and
the phy-mode "trgmii" required being provided when reg
is equal to 0 and the MAC uses fixed-link to connect
with internal switch such as MT7530.

Example:

Expand All @@ -51,6 +54,7 @@ eth: ethernet@1b100000 {
reset-names = "eth";
mediatek,ethsys = <&ethsys>;
mediatek,pctl = <&syscfg_pctl_a>;
mediatek,hwlro;
#address-cells = <1>;
#size-cells = <0>;

Expand Down
58 changes: 58 additions & 0 deletions Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt
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@@ -0,0 +1,58 @@
* Microsemi - vsc8531 Giga bit ethernet phy

Required properties:
- compatible : Should contain phy id as "ethernet-phy-idAAAA.BBBB"
The PHY device uses the binding described in
Documentation/devicetree/bindings/net/phy.txt

Optional properties:
- vsc8531,vddmac : The vddmac in mV.
- vsc8531,edge-slowdown : % the edge should be slowed down relative to
the fastest possible edge time. Native sign
need not enter.
Edge rate sets the drive strength of the MAC
interface output signals. Changing the drive
strength will affect the edge rate of the output
signal. The goal of this setting is to help
reduce electrical emission (EMI) by being able
to reprogram drive strength and in effect slow
down the edge rate if desired. Table 1 shows the
impact to the edge rate per VDDMAC supply for each
drive strength setting.
Ref: Table:1 - Edge rate change below.

Note: see dt-bindings/net/mscc-phy-vsc8531.h for applicable values

Table: 1 - Edge rate change
----------------------------------------------------------------|
| Edge Rate Change (VDDMAC) |
| |
| 3300 mV 2500 mV 1800 mV 1500 mV |
|---------------------------------------------------------------|
| Default Deafult Default Default |
| (Fastest) (recommended) (recommended) |
|---------------------------------------------------------------|
| -2% -3% -5% -6% |
|---------------------------------------------------------------|
| -4% -6% -9% -14% |
|---------------------------------------------------------------|
| -7% -10% -16% -21% |
|(recommended) (recommended) |
|---------------------------------------------------------------|
| -10% -14% -23% -29% |
|---------------------------------------------------------------|
| -17% -23% -35% -42% |
|---------------------------------------------------------------|
| -29% -37% -52% -58% |
|---------------------------------------------------------------|
| -53% -63% -76% -77% |
| (slowest) |
|---------------------------------------------------------------|

Example:

vsc8531_0: ethernet-phy@0 {
compatible = "ethernet-phy-id0007.0570";
vsc8531,vddmac = <3300>;
vsc8531,edge-slowdown = <21>;
};
111 changes: 111 additions & 0 deletions Documentation/devicetree/bindings/net/qcom-emac.txt
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@@ -0,0 +1,111 @@
Qualcomm Technologies EMAC Gigabit Ethernet Controller

This network controller consists of two devices: a MAC and an SGMII
internal PHY. Each device is represented by a device tree node. A phandle
connects the MAC node to its corresponding internal phy node. Another
phandle points to the external PHY node.

Required properties:

MAC node:
- compatible : Should be "qcom,fsm9900-emac".
- reg : Offset and length of the register regions for the device
- interrupts : Interrupt number used by this controller
- mac-address : The 6-byte MAC address. If present, it is the default
MAC address.
- internal-phy : phandle to the internal PHY node
- phy-handle : phandle the the external PHY node

Internal PHY node:
- compatible : Should be "qcom,fsm9900-emac-sgmii" or "qcom,qdf2432-emac-sgmii".
- reg : Offset and length of the register region(s) for the device
- interrupts : Interrupt number used by this controller

The external phy child node:
- reg : The phy address

Example:

FSM9900:

soc {
#address-cells = <1>;
#size-cells = <1>;

emac0: ethernet@feb20000 {
compatible = "qcom,fsm9900-emac";
reg = <0xfeb20000 0x10000>,
<0xfeb36000 0x1000>;
interrupts = <76>;

clocks = <&gcc 0>, <&gcc 1>, <&gcc 3>, <&gcc 4>, <&gcc 5>,
<&gcc 6>, <&gcc 7>;
clock-names = "axi_clk", "cfg_ahb_clk", "high_speed_clk",
"mdio_clk", "tx_clk", "rx_clk", "sys_clk";

internal-phy = <&emac_sgmii>;

phy-handle = <&phy0>;

#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};

pinctrl-names = "default";
pinctrl-0 = <&mdio_pins_a>;
};

emac_sgmii: ethernet@feb38000 {
compatible = "qcom,fsm9900-emac-sgmii";
reg = <0xfeb38000 0x1000>;
interrupts = <80>;
};

tlmm: pinctrl@fd510000 {
compatible = "qcom,fsm9900-pinctrl";

mdio_pins_a: mdio {
state {
pins = "gpio123", "gpio124";
function = "mdio";
};
};
};


QDF2432:

soc {
#address-cells = <2>;
#size-cells = <2>;

emac0: ethernet@38800000 {
compatible = "qcom,fsm9900-emac";
reg = <0x0 0x38800000 0x0 0x10000>,
<0x0 0x38816000 0x0 0x1000>;
interrupts = <0 256 4>;

clocks = <&gcc 0>, <&gcc 1>, <&gcc 3>, <&gcc 4>, <&gcc 5>,
<&gcc 6>, <&gcc 7>;
clock-names = "axi_clk", "cfg_ahb_clk", "high_speed_clk",
"mdio_clk", "tx_clk", "rx_clk", "sys_clk";

internal-phy = <&emac_sgmii>;

phy-handle = <&phy0>;

#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@4 {
reg = <4>;
};
};

emac_sgmii: ethernet@410400 {
compatible = "qcom,qdf2432-emac-sgmii";
reg = <0x0 0x00410400 0x0 0xc00>, /* Base address */
<0x0 0x00410000 0x0 0x400>; /* Per-lane digital */
interrupts = <0 254 1>;
};
8 changes: 6 additions & 2 deletions Documentation/devicetree/bindings/net/rockchip-dwmac.txt
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Expand Up @@ -3,8 +3,12 @@ Rockchip SoC RK3288 10/100/1000 Ethernet driver(GMAC)
The device node has following properties.

Required properties:
- compatible: Can be one of "rockchip,rk3228-gmac", "rockchip,rk3288-gmac",
"rockchip,rk3368-gmac"
- compatible: should be "rockchip,<name>-gamc"
"rockchip,rk3228-gmac": found on RK322x SoCs
"rockchip,rk3288-gmac": found on RK3288 SoCs
"rockchip,rk3366-gmac": found on RK3366 SoCs
"rockchip,rk3368-gmac": found on RK3368 SoCs
"rockchip,rk3399-gmac": found on RK3399 SoCs
- reg: addresses and length of the register sets for the device.
- interrupts: Should contain the GMAC interrupts.
- interrupt-names: Should contain the interrupt names "macirq".
Expand Down
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