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work/ | ||
transcript | ||
fifo_xgmii_retransmit_32b32b | ||
*.vstf | ||
*.wlf | ||
wlf* |
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default: all | ||
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SEED?=$(shell date +%N) | ||
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USR_OPTS?= | ||
GUI?=0 | ||
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ifeq ($(GUI),1) | ||
GUI_ENABLE:= | ||
DO:=do.do | ||
OPT:=-novopt | ||
else | ||
GUI_ENABLE:=-c | ||
DO:="run -a" | ||
OPT:= | ||
endif | ||
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TEST_LIST+=test_r100_lin_b64_b64 | ||
TEST_LIST+=test_r100_lin_b1500_b1500 | ||
TEST_LIST+=test_r100_lin_b64_b1500 | ||
TEST_LIST+=test_r100_rnd_b64_b1500 | ||
TEST_LIST+=test_r50_lin_b64_b64 | ||
TEST_LIST+=test_r50_lin_b1500_b1500 | ||
TEST_LIST+=test_r50_lin_b64_b1500 | ||
TEST_LIST+=test_r50_rnd_b64_b1500 | ||
TEST_LIST+=test_r10_lin_b64_b64 | ||
TEST_LIST+=test_r10_lin_b1500_b1500 | ||
TEST_LIST+=test_r10_lin_b64_b1500 | ||
TEST_LIST+=test_r10_rnd_b64_b1500 | ||
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TOPDIR:=../../../. | ||
IPDIR:=$(TOPDIR)/ip | ||
LIBDIR:=$(TOPDIR)/lib | ||
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IPSRC:= \ | ||
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LIBSRC:= \ | ||
./gtype.sv \ | ||
./xgmii_retransmit_32b32b_fifo/xgmii_retransmit_32b32b_fifo.sv \ | ||
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TESTSRC:= \ | ||
../../test/vsim_common/test_type.sv \ | ||
./interface.sv \ | ||
../../test/vsim_common/ethpack.sv \ | ||
../../test/vsim_common/driver2xgmii.sv \ | ||
../../test/vsim_common/monitor4xgmii.sv \ | ||
../../test/vsim_common/ethpack_generator.sv \ | ||
../../test/vsim_common/config.sv \ | ||
../../test/vsim_common/scoreboard_pack.sv \ | ||
./environment.sv \ | ||
./dut.sv \ | ||
./test.sv \ | ||
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IPSRC:= $(addprefix $(IPDIR)/, $(IPSRC)) | ||
LIBSRC:= $(addprefix $(LIBDIR)/, $(LIBSRC)) | ||
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clean: | ||
rm -rf transcript | ||
rm -rf vsim.wlf | ||
rm -rf wlft* | ||
rm -rf work/ | ||
rm -rf fifo_xgmii_retransmit_32b32b/ | ||
rm -rf ./log/*.log | ||
rm -rf ./log/*.vsim | ||
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VSIM_L:= -L work -L fifo_xgmii_retransmit_32b32b -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L stratixv_ver -L stratixv_hssi_ver -L stratixv_pcie_hip_ver | ||
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run: $(TEST_LIST) | ||
test_r100_lin_b64_b64 : ; @./prerun.sh test_r100_lin_b64_b64 ; vsim $(VSIM_L) -logfile ./log/test_r100_lin_b64_b64.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=100 +generator_count_packets=200 +generator_len_packet_type="lin" +generator_len_packet_start=64 +generator_len_packet_finish=64 -do $(DO) > ./log/test_r100_lin_b64_b64.vsim ; ./postrun.sh test_r100_lin_b64_b64 | ||
test_r100_lin_b1500_b1500 : ; @./prerun.sh test_r100_lin_b1500_b1500 ; vsim $(VSIM_L) -logfile ./log/test_r100_lin_b1500_b1500.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=100 +generator_count_packets=50 +generator_len_packet_type="lin" +generator_len_packet_start=1500 +generator_len_packet_finish=1500 -do $(DO) > ./log/test_r100_lin_b1500_b1500.vsim ; ./postrun.sh test_r100_lin_b1500_b1500 | ||
test_r100_lin_b64_b1500 : ; @./prerun.sh test_r100_lin_b64_b1500 ; vsim $(VSIM_L) -logfile ./log/test_r100_lin_b64_b1500.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=100 +generator_count_packets=200 +generator_len_packet_type="lin" +generator_len_packet_start=64 +generator_len_packet_finish=1500 -do $(DO) > ./log/test_r100_lin_b64_b1500.vsim ; ./postrun.sh test_r100_lin_b64_b1500 | ||
test_r100_rnd_b64_b1500 : ; @./prerun.sh test_r100_rnd_b64_b1500 ; vsim $(VSIM_L) -logfile ./log/test_r100_rnd_b64_b1500.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=100 +generator_count_packets=200 +generator_len_packet_type="rnd" +generator_len_packet_start=64 +generator_len_packet_finish=1500 -do $(DO) > ./log/test_r100_rnd_b64_b1500.vsim ; ./postrun.sh test_r100_rnd_b64_b1500 | ||
test_r50_lin_b64_b64 : ; @./prerun.sh test_r50_lin_b64_b64 ; vsim $(VSIM_L) -logfile ./log/test_r50_lin_b64_b64.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=50 +generator_count_packets=200 +generator_len_packet_type="lin" +generator_len_packet_start=64 +generator_len_packet_finish=64 -do $(DO) > ./log/test_r50_lin_b64_b64.vsim ; ./postrun.sh test_r50_lin_b64_b64 | ||
test_r50_lin_b1500_b1500 : ; @./prerun.sh test_r50_lin_b1500_b1500 ; vsim $(VSIM_L) -logfile ./log/test_r50_lin_b1500_b1500.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=50 +generator_count_packets=50 +generator_len_packet_type="lin" +generator_len_packet_start=1500 +generator_len_packet_finish=1500 -do $(DO) > ./log/test_r50_lin_b1500_b1500.vsim ; ./postrun.sh test_r50_lin_b1500_b1500 | ||
test_r50_lin_b64_b1500 : ; @./prerun.sh test_r50_lin_b64_b1500 ; vsim $(VSIM_L) -logfile ./log/test_r50_lin_b64_b1500.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=50 +generator_count_packets=200 +generator_len_packet_type="lin" +generator_len_packet_start=64 +generator_len_packet_finish=1500 -do $(DO) > ./log/test_r50_lin_b64_b1500.vsim ; ./postrun.sh test_r50_lin_b64_b1500 | ||
test_r50_rnd_b64_b1500 : ; @./prerun.sh test_r50_rnd_b64_b1500 ; vsim $(VSIM_L) -logfile ./log/test_r50_rnd_b64_b1500.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=50 +generator_count_packets=200 +generator_len_packet_type="rnd" +generator_len_packet_start=64 +generator_len_packet_finish=1500 -do $(DO) > ./log/test_r50_rnd_b64_b1500.vsim ; ./postrun.sh test_r50_rnd_b64_b1500 | ||
test_r10_lin_b64_b64 : ; @./prerun.sh test_r10_lin_b64_b64 ; vsim $(VSIM_L) -logfile ./log/test_r10_lin_b64_b64.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=10 +generator_count_packets=200 +generator_len_packet_type="lin" +generator_len_packet_start=64 +generator_len_packet_finish=64 -do $(DO) > ./log/test_r10_lin_b64_b64.vsim ; ./postrun.sh test_r10_lin_b64_b64 | ||
test_r10_lin_b1500_b1500 : ; @./prerun.sh test_r10_lin_b1500_b1500 ; vsim $(VSIM_L) -logfile ./log/test_r10_lin_b1500_b1500.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=10 +generator_count_packets=50 +generator_len_packet_type="lin" +generator_len_packet_start=1500 +generator_len_packet_finish=1500 -do $(DO) > ./log/test_r10_lin_b1500_b1500.vsim ; ./postrun.sh test_r10_lin_b1500_b1500 | ||
test_r10_lin_b64_b1500 : ; @./prerun.sh test_r10_lin_b64_b1500 ; vsim $(VSIM_L) -logfile ./log/test_r10_lin_b64_b1500.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=10 +generator_count_packets=200 +generator_len_packet_type="lin" +generator_len_packet_start=64 +generator_len_packet_finish=1500 -do $(DO) > ./log/test_r10_lin_b64_b1500.vsim ; ./postrun.sh test_r10_lin_b64_b1500 | ||
test_r10_rnd_b64_b1500 : ; @./prerun.sh test_r10_rnd_b64_b1500 ; vsim $(VSIM_L) -logfile ./log/test_r10_rnd_b64_b1500.log $(OPT) $(GUI_ENABLE) -nostdout top -sv_seed $(SEED) $(USR_OPTS) +test_force_linkdown=0 +generator_rate=10 +generator_count_packets=200 +generator_len_packet_type="rnd" +generator_len_packet_start=64 +generator_len_packet_finish=1500 -do $(DO) > ./log/test_r10_rnd_b64_b1500.vsim ; ./postrun.sh test_r10_rnd_b64_b1500 | ||
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compile_work: | ||
rm -rf work | ||
vlib work | ||
vlog -sv -lint $(LIBSRC) $(IPSRC) $(TESTSRC) +incdir+../../test/vsim_common/ top.sv | ||
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compile_fifo_xgmii_retransmit_32b32b: | ||
rm -rf fifo_xgmii_retransmit_32b32b | ||
vlib fifo_xgmii_retransmit_32b32b | ||
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vlog $(IPDIR)/fifo_xgmii_retransmit_32b32b/fifo_191/sim/fifo_xgmii_retransmit_32b32b_fifo_191_rx5n6ai.v -work fifo_xgmii_retransmit_32b32b | ||
vlog $(IPDIR)/fifo_xgmii_retransmit_32b32b/sim/fifo_xgmii_retransmit_32b32b.v -work fifo_xgmii_retransmit_32b32b | ||
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compile: compile_fifo_xgmii_retransmit_32b32b compile_work | ||
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all: clean compile | ||
$(MAKE) run |
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add wave -divider #dut_u# | ||
add wave -position end sim:/top/dut_u/clk_rx | ||
add wave -position end sim:/top/dut_u/rst_rx | ||
add wave -position end sim:/top/dut_u/clk_tx | ||
add wave -position end sim:/top/dut_u/rst_tx | ||
add wave -divider ## | ||
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add wave -divider #xgmii_retransmit_32b32b_fifo_u# | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/clk_rx | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/rx | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/clk_tx | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/tx | ||
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add wave -divider #fifo_xgmii_retransmit_32b32b_u# | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/fifo_xgmii_retransmit_32b32b_u/wrclk | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/fifo_xgmii_retransmit_32b32b_u/wrreq | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/fifo_xgmii_retransmit_32b32b_u/data | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/fifo_xgmii_retransmit_32b32b_u/wrfull | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/fifo_xgmii_retransmit_32b32b_u/rdclk | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/fifo_xgmii_retransmit_32b32b_u/rdreq | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/fifo_xgmii_retransmit_32b32b_u/q | ||
add wave -position end sim:/top/dut_u/xgmii_retransmit_32b32b_fifo_u/fifo_xgmii_retransmit_32b32b_u/rdempty | ||
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run -a |
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import gtype::xgmii32_t; | ||
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module dut | ||
( | ||
input wire clk_rx, | ||
input wire clk_tx, | ||
input wire rst_rx, | ||
input wire rst_tx, | ||
xgmii_if.DutTx Tx, | ||
xgmii_if.DutRx Rx | ||
); | ||
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wire xgmii_retransmit_32b32b_fifo_clk_rx_w; | ||
xgmii32_t xgmii_retransmit_32b32b_fifo_rx_w; | ||
wire xgmii_retransmit_32b32b_fifo_clk_tx_w; | ||
xgmii32_t xgmii_retransmit_32b32b_fifo_tx_w; | ||
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////////////////////////////////////////////////////////////////////////// | ||
assign Tx.clk = clk_tx; | ||
assign Tx.rst = rst_tx; | ||
assign Tx.rdy = !rst_tx; | ||
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assign Rx.clk = clk_rx; | ||
assign Rx.rst = rst_rx; | ||
assign Rx.data = xgmii_retransmit_32b32b_fifo_tx_w.data; | ||
assign Rx.ctrl = xgmii_retransmit_32b32b_fifo_tx_w.ctrl; | ||
assign Rx.ena = xgmii_retransmit_32b32b_fifo_tx_w.ena ; | ||
////////////////////////////////////////////////////////////////////////// | ||
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//////////////////////////////////////////////////////////////////////////////// | ||
assign xgmii_retransmit_32b32b_fifo_clk_rx_w = clk_tx; | ||
assign xgmii_retransmit_32b32b_fifo_rx_w = {Tx.ena,Tx.ctrl,Tx.data}; | ||
assign xgmii_retransmit_32b32b_fifo_clk_tx_w = clk_rx; | ||
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xgmii_retransmit_32b32b_fifo xgmii_retransmit_32b32b_fifo_u | ||
( | ||
.clk_rx (xgmii_retransmit_32b32b_fifo_clk_rx_w), | ||
.rx (xgmii_retransmit_32b32b_fifo_rx_w ), | ||
.clk_tx (xgmii_retransmit_32b32b_fifo_clk_tx_w), | ||
.tx (xgmii_retransmit_32b32b_fifo_tx_w ) | ||
); | ||
//////////////////////////////////////////////////////////////////////////////// | ||
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endmodule |
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`ifndef ENVIRONMENT__SV | ||
`define ENVIRONMENT__SV | ||
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`include "ethpack_generator.sv" | ||
`include "driver2xgmii.sv" | ||
`include "monitor4xgmii.sv" | ||
`include "config.sv" | ||
`include "scoreboard_pack.sv" | ||
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///////////////////////////////////////////////////////// | ||
// Call scoreboard from Driver using callbacks | ||
///////////////////////////////////////////////////////// | ||
class Scb_Driver_cbs #(parameter XGMII_WIDTH = 64) extends Driver2xgmii_cbs #(.XGMII_WIDTH(XGMII_WIDTH)); | ||
Scoreboard scb; | ||
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function new(Scoreboard scb); | ||
this.scb = scb; | ||
endfunction | ||
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// Send received pack to scoreboard | ||
virtual task post_tx(input Driver2xgmii #(.XGMII_WIDTH(XGMII_WIDTH)) drv, input Ethpack pack); | ||
scb.save_expected(pack); | ||
endtask | ||
endclass | ||
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///////////////////////////////////////////////////////// | ||
// Call scoreboard from Monitor using callbacks | ||
///////////////////////////////////////////////////////// | ||
class Scb_Monitor_cbs #(parameter XGMII_WIDTH = 64) extends Monitor4xgmii_cbs #(.XGMII_WIDTH(XGMII_WIDTH)); | ||
Scoreboard scb; | ||
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function new(Scoreboard scb); | ||
this.scb = scb; | ||
endfunction | ||
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// Send received cell to scoreboard | ||
virtual task post_rx(input Monitor4xgmii #(.XGMII_WIDTH(XGMII_WIDTH)) mon, input Ethpack pack); | ||
scb.check_actual(pack); | ||
endtask | ||
endclass | ||
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class Environment #(parameter XGMII_WIDTH = 32); | ||
Ethpack_generator gen[]; | ||
mailbox gen2drv[]; | ||
event drv2gen[]; | ||
Driver2xgmii #(.XGMII_WIDTH(XGMII_WIDTH)) drv[]; | ||
Monitor4xgmii #(.XGMII_WIDTH(XGMII_WIDTH)) mon[]; | ||
Config cfg; | ||
Scoreboard scb; | ||
virtual xgmii_if#(XGMII_WIDTH).TbTx Tx; | ||
virtual xgmii_if#(XGMII_WIDTH).TbRx Rx; | ||
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extern function new(input virtual xgmii_if#(XGMII_WIDTH).TbTx Tx, input virtual xgmii_if#(XGMII_WIDTH).TbRx Rx); | ||
extern virtual function void build(); | ||
extern virtual task run(); | ||
extern virtual function void wrap_up(); | ||
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endclass | ||
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function Environment::new | ||
( | ||
input virtual xgmii_if#(XGMII_WIDTH ).TbTx Tx, | ||
input virtual xgmii_if#(XGMII_WIDTH).TbRx Rx | ||
); | ||
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this.Tx = Tx; | ||
this.Rx = Rx; | ||
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cfg = new(); | ||
endfunction | ||
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function void Environment::build(); | ||
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gen = new[1]; | ||
drv = new[1]; | ||
gen2drv = new[1]; | ||
drv2gen = new[1]; | ||
scb = new(cfg,""); | ||
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gen2drv[0] = new(); | ||
gen[0] = new(gen2drv[0], drv2gen[0], cfg , ""); | ||
drv[0] = new(gen2drv[0], drv2gen[0], cfg, Tx, 32, 1, ""); | ||
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mon = new[1]; | ||
mon[0] = new(Rx, ""); | ||
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// Connect the scoreboard with callbacks | ||
begin | ||
Scb_Driver_cbs #(.XGMII_WIDTH(XGMII_WIDTH)) sdc = new(scb); | ||
Scb_Monitor_cbs #(.XGMII_WIDTH(XGMII_WIDTH)) smc = new(scb); | ||
foreach (drv[i]) drv[i].cbsq.push_back(sdc); // Add scb to every driver | ||
foreach (mon[i]) mon[i].cbsq.push_back(smc); // Add scb to every monitor | ||
end | ||
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endfunction | ||
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task Environment::run(); | ||
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int num_gen_running; | ||
num_gen_running = 1; | ||
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// For each input RX channel, start generator and driver | ||
foreach(gen[i]) begin | ||
int j=i; // Automatic variable to hold index in spawned threads | ||
fork begin | ||
gen[j].run(); // Wait for generator to finish | ||
num_gen_running--; // Decrement driver count | ||
end | ||
drv[j].run(); | ||
join_none | ||
end | ||
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foreach(mon[i]) begin | ||
int j=i; // Automatic variable to hold index in spawned threads | ||
fork | ||
mon[j].run(); | ||
join_none | ||
end | ||
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// Wait for all generators to finish, or time-out | ||
fork : timeout_block | ||
wait (num_gen_running == 0); | ||
begin | ||
repeat (1000000) @(Tx.tbtx_cb); | ||
$display("@%0t: %m Env: ERROR: Timeout while waiting for generators to finish", $time); | ||
cfg.nErrors = cfg.nErrors + 1; | ||
end | ||
join_any | ||
disable timeout_block; | ||
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// Wait a little longer for the data flow through switch, into monitors, and scoreboards | ||
repeat (1000) @(Tx.tbtx_cb); | ||
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endtask : run | ||
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function void Environment::wrap_up(); | ||
scb.wrap_up; | ||
$display("@%0t: Env: End of simulation, %0d ERROR, %0d WARNING", $time, cfg.nErrors, cfg.nWarnings); | ||
endfunction | ||
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`endif | ||
|
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`ifndef INTERFACE__SV | ||
`define INTERFACE__SV | ||
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interface xgmii_if #(parameter WIDTH = 32); | ||
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logic [(WIDTH-1):0] data; | ||
logic [(WIDTH/8-1):0] ctrl; | ||
logic rdy; | ||
logic clk; | ||
logic rst; | ||
logic ena; | ||
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modport DutTx | ||
( | ||
output clk, | ||
output rst, | ||
input data, | ||
input ctrl, | ||
input ena, | ||
output rdy | ||
); | ||
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modport DutRx | ||
( | ||
output clk, | ||
output rst, | ||
output data, | ||
output ctrl, | ||
output ena, | ||
input rdy | ||
); | ||
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clocking tbtx_cb @(posedge clk); | ||
input clk; | ||
input rst; | ||
output data; | ||
output ctrl; | ||
output ena; | ||
input rdy; | ||
endclocking | ||
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modport TbTx | ||
( | ||
clocking tbtx_cb | ||
); | ||
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clocking tbrx_cb @(posedge clk); | ||
input clk; | ||
input rst; | ||
input data; | ||
input ctrl; | ||
input ena; | ||
output rdy; | ||
endclocking | ||
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modport TbRx | ||
( | ||
clocking tbrx_cb | ||
); | ||
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endinterface | ||
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`endif | ||
|
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*.vsim | ||
*.log |
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