- Tool version: 2018.3
# Prepare SDx command
$ . <SDx installation directory>/settings64.sh
# Go into the project directory of choice
$ cd <project name>
- Odd-Even sort
- Binary CNN
- optimized: Optimized code (Fits in Zybo (Zynq-7010))
- templated: Templated version (Does not fit in Zybo)
- Original source: http://www.cqpub.co.jp/interface/download/2016/9/IF1609F.zip
- Example of embedding build date/time into HW
- Writing to & reading from PL's local memory from PS
- Xilinx reVISION test code
- simple_copy: Test code for simple copying of data
- histogram: Example of performance improvement by not using xf::calcHist()
-
Using Vivado HLS video library ( hls::***() ) in SDSoC
-
WARNING: this code does not work with SDSoC 2017.4 (2017.2 is OK)
-
Performance (CPU clock cycle @ 142.86 [MHz]):
Image Size [px] SW HW Speed-up 1920 x 1080 169,424,338,952 9,812,102 17,266 256 x 256 3,593,393,664 289,420 12,415
- FPGA implementation of local laplacian pyramid
- Original code: https://github.com/psalvaggio/local_laplacian_filters
- FPGA implementation of fast local laplacian pyramid
- Original code:
- SDSoC implementation of BNN-PYNQ