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design rules, refactor CPU symbol, misc #7

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Jul 31, 2023
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add initial design rules and stack
  • Loading branch information
dlharmon committed Jul 26, 2023
commit ae2a2c167f07d4960e7ef2fb2057583efa388dd1
118 changes: 59 additions & 59 deletions pcb-rpl-uph/usb-c.kicad_sch
Original file line number Diff line number Diff line change
Expand Up @@ -344,225 +344,225 @@
)
)

(junction (at 148.336 120.904) (diameter 0) (color 0 0 0 0)
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)
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)
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(uuid e0c3c33d-f4ac-4bd0-966a-bf9b08a427f5)
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(bus_entry (at 101.6 87.884) (size 2.54 2.54)
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(uuid a5d6157c-f99b-4c3d-b640-3ee460c21339)
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(uuid aa94a29b-1607-4618-a883-14849b9386ed)
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(bus_entry (at 101.6 85.344) (size 2.54 2.54)
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(uuid bca2730a-45fb-47dc-9f9a-adc431287631)
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(bus_entry (at 101.6 92.964) (size 2.54 2.54)
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(wire (pts (xy 104.14 98.044) (xy 133.096 98.044))
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(text "TODO: VBUS, CC, SBU" (at 133.096 48.006 0)
(text "TODO: VBUS, CC, SBU, ESD, AC caps" (at 133.096 48.006 0)
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(label "USBC.D-" (at 104.14 67.564 0) (fields_autoplaced)
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(uuid 32ce3042-a0da-4a97-9451-7b1511aaaaeb)
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(label "USBC.RX+1" (at 104.14 82.804 0) (fields_autoplaced)
(label "USBC.RX+1" (at 104.14 82.55 0) (fields_autoplaced)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid 809502bd-c502-4663-8906-fe6753915828)
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(label "USBC.TX+1" (at 104.14 90.424 0) (fields_autoplaced)
(label "USBC.TX+1" (at 104.14 90.17 0) (fields_autoplaced)
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(uuid 9540e8fc-3ef6-4863-b871-512d59d9a62a)
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(label "USBC.RX-1" (at 104.14 80.264 0) (fields_autoplaced)
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(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid 990b13f0-f29c-4250-8da1-94b05ee8e843)
)
(label "USBC.RX-2" (at 104.14 95.504 0) (fields_autoplaced)
(label "USBC.RX-2" (at 104.14 95.25 0) (fields_autoplaced)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid a3228898-2524-40b8-bd9d-526b0a338117)
)
(label "USBC.TX+2" (at 104.14 105.664 0) (fields_autoplaced)
(label "USBC.TX+2" (at 104.14 105.41 0) (fields_autoplaced)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid a9467568-f538-4b60-97ac-00d18fd70145)
)
(label "USBC.TX-2" (at 104.14 103.124 0) (fields_autoplaced)
(label "USBC.TX-2" (at 104.14 102.87 0) (fields_autoplaced)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid bfb959f6-7b9f-470e-8d4d-78608ac9fa20)
)
(label "USBC.TX-1" (at 104.14 87.884 0) (fields_autoplaced)
(label "USBC.TX-1" (at 104.14 87.63 0) (fields_autoplaced)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid cdfce38f-c31d-42ba-96ac-8707b7c91831)
)
(label "USBC.RX+2" (at 104.14 98.044 0) (fields_autoplaced)
(label "USBC.RX+2" (at 104.14 97.79 0) (fields_autoplaced)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid f50e733a-1fa0-4372-8156-bc3c51996019)
)

(hierarchical_label "USBC{D+,D-,TX+[1..2],TX-[1..2],RX+[1..2],RX-[1..2]}" (shape bidirectional)
(at 100.33 47.244 180) (fields_autoplaced)
(at 100.33 46.99 180) (fields_autoplaced)
(effects (font (size 1.27 1.27)) (justify right))
(uuid b02760a9-0150-461e-878c-66c01385bcd0)
)

(symbol (lib_id "power:GND") (at 148.336 120.904 0) (unit 1)
(symbol (lib_id "power:GND") (at 148.59 120.65 0) (unit 1)
(in_bom yes) (on_board yes) (dnp no) (fields_autoplaced)
(uuid cf918e5a-b29a-4d89-81d9-b7e389fa754a)
(property "Reference" "#PWR018" (at 148.336 127.254 0)
(property "Reference" "#PWR018" (at 148.59 127 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Value" "GND" (at 148.336 125.73 0)
(property "Value" "GND" (at 148.59 125.476 0)
(effects (font (size 1.27 1.27)))
)
(property "Footprint" "" (at 148.336 120.904 0)
(property "Footprint" "" (at 148.59 120.65 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "" (at 148.336 120.904 0)
(property "Datasheet" "" (at 148.59 120.65 0)
(effects (font (size 1.27 1.27)) hide)
)
(pin "1" (uuid 85a9389a-3973-4fa2-bfd2-61a47062b1ab))
Expand All @@ -584,19 +584,19 @@
)
)

(symbol (lib_id "Connector:USB_C_Receptacle") (at 148.336 80.264 0) (mirror y) (unit 1)
(symbol (lib_id "Connector:USB_C_Receptacle") (at 148.59 80.01 0) (mirror y) (unit 1)
(in_bom yes) (on_board yes) (dnp no)
(uuid edeff5ef-0285-4a65-ace5-41ee21040907)
(property "Reference" "J5" (at 159.766 85.344 0)
(property "Reference" "J5" (at 160.02 85.09 0)
(effects (font (size 1.27 1.27)) (justify right))
)
(property "Value" "USB_C_Receptacle" (at 159.766 82.804 0)
(property "Value" "USB_C_Receptacle" (at 160.02 82.55 0)
(effects (font (size 1.27 1.27)) (justify right))
)
(property "Footprint" "local:USB_C_Receptacle_Amphenol_12401610E4-2A" (at 144.526 80.264 0)
(property "Footprint" "local:USB_C_Receptacle_Amphenol_12401610E4-2A" (at 144.78 80.01 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "https://www.usb.org/sites/default/files/documents/usb_type-c.zip" (at 144.526 80.264 0)
(property "Datasheet" "https://www.usb.org/sites/default/files/documents/usb_type-c.zip" (at 144.78 80.01 0)
(effects (font (size 1.27 1.27)) hide)
)
(pin "A1" (uuid ea059b19-40b0-4bbf-8c73-9f1346992471))
Expand Down
17 changes: 17 additions & 0 deletions pcb-rpl-uph/virgo-rpl-uph.kicad_dru
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
(version 1)

(rule "Distance between Vias of Different Nets"
(constraint hole_to_hole (min 0.3mm))
(condition "A.Type =='Via' && B.Type =='Via' && A.Net != B.Net"))

(rule "Via to Track Clearance"
(constraint hole_clearance (min 0.2mm))
(condition "A.Type =='Via' && B.Type =='Track'"))

(rule "Via to Plane Clearance"
(constraint hole_clearance (min 0.225mm))
(condition "A.Type =='Via' && B.Type =='Zone'"))

(rule "Trace not GND to Plane Clearance"
(constraint clearance (min 0.25mm))
(condition "A.Type =='Track' && B.Type =='Zone' && A.Net != 'GND'"))
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