Add ring detector LSI docs

schlae · Jun 16, 2024 · 79b4597 · 79b4597
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diff --git a/README.md b/README.md
@@ -390,3 +390,61 @@ The step sequence is as follows:
 
 This is designed for a 5-phase stepper motor (10 wire) but it does not drive phases B and C.
 
+### 11744-502 "RING DETECTOR"
+
+This device serves two purposes:
+
+* Provided a digitally-controlled linear regulated power source to the stepper motor
+* Detect back-EMF "ringing" cycles on the stepper motor windings
+
+**Pin Description**
+
+| Pin | Name  | Direction | Description                                     |
+|-----|-------|-----------|-------------------------------------------------|
+| 6   | +12V  | Power     | 12V power input. |
+| 13  | GND   | Ground    | Connect to ground. |
+| 7   | VREF  | Power     | 2.5V reference voltage input. |
+| 4   | CS#   | Input | Active low chip select input. |
+| 3   | SET\_CLK | Input | Clock input for SPI shift register. Normally high but latches on the rising edge. |
+| 2   | SET\_DATA | Input | Data input for SPI shift register. |
+| 1   | SYS\_CLK | Input | System clock input, used for one-shot timing. |
+| 8   | DAC\_SET |        | DAC output voltage from 0 to VREF/2. Add a resistor to ground to set the current. |
+| 9   | DRV | Output | Drives external pass transistors for linear regulator. |
+| 10  | COMP |       | Compensation node for linear regulator. |
+| 11  | FB   | Input | Feedback node for linear regulator. |
+| 12  | RING\_SET| Input | Ring detector threshold voltage setpoint. |
+| 18  | A+   | Input | Motor phase A+ input. |
+| 23  | A-   | Input | Motor phase A- input. |
+| 17  | B+   | Input | Motor phase B+ input. |
+| 22  | B-   | Input | Motor phase B- input. |
+| 16  | C+   | Input | Motor phase C+ input. |
+| 21  | C-   | Input | Motor phase C- input. |
+| 15  | D+   | Input | Motor phase D+ input. |
+| 20  | D-   | Input | Motor phase D- input. |
+| 14  | E+   | Input | Motor phase E+ input. |
+| 19  | E-   | Input | Motor phase E- input. |
+| 24  | RING\_DET | O.C. | Ring detector comparator output. |
+| 5   | NC   |       | Not connected. |
+
+
+**Functional Description**
+
+The device has a linear regulator with a 7-bit DAC controlling the voltage. The topology is simple. The output voltage is monitored by an external resistor divider tied to FB and compared directly with the VREF input. The error amplifier output connects to the COMP pin for external compensation purposes. The DRV pin is inverted and connects to an external PNP pass transistor (or an arrangement of an NPN and a PNP).
+
+Communications to the device occurs over a simple 8-bit SPI bus (no data output). Deassert the active-low CS# line and clock data, LSB first, into the device (CLK normally high, rising edge triggered), then release CS#. The data format is as follows:
+
+| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Description |
+|---|---|---|---|---|---|---|---|-------------|
+| 1 | n | n | n | n | n | n | n | Update DAC with the code n. |
+| 0 | x | x | x | x | m | m | m | Update the ring mux selector with code m. x bits are ignored. |
+
+The built-in DAC is a 7-bit device that drives a voltage from 0 to VREF/2 onto the DAC\_SET pin. An external resistor connected to ground turns this into a current that is drawn from the FB pin. The higher this current, the more the output voltage increases.
+
+The nominal output voltage is Vref * (1 + Rtop/Rbot). With the values in the ST-251 schematic, this is 3.75V, assuming the DAC is set to 0.
+
+The DAC increases the output voltage by Rtop * (VDAC / RDAC\_SET). VDAC is just (n/127) * (VREF/2). For example, a DAC code of 0x2A results in a DAC output voltage of 0.413V. Using the values in the ST-251 schematic, this is a current of 255uA pulled from the FB node. With an upper resistor of 10K, this corresponds with a voltage increase of 2.55V. The total output voltage is then 6.3V.
+
+The ring detector is a window comparator that examines one of five possible differential inputs, A-E. The input is selected using the SPI bus with the MSB set to 1 and the value 0-4 loaded into the LSBs.
+
+The window threshold is controlled by the voltage applied to the RING\_SET pin. It seems to be a percentage of that voltage. The output of the window comparator goes to a digitally-timed counter state machine which is incompletely understood but clocked by the SYS\_CLK input. The output of this is passed along to the RING\_DET output (which must be pulled up externally). In typical operation, this pin toggles on every edge of the ringing signal generated by the back EMF of the stepper motor winding.
+