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Issues list

ICE: intrinsicck: index out of bounds: the len is 0 but the index is 0 A-inline-assembly Area: Inline assembly (`asm!(…)`) A-SIMD Area: SIMD (Single Instruction Multiple Data) C-bug Category: This is a bug. I-ICE Issue: The compiler panicked, giving an Internal Compilation Error (ICE) ❄️ S-bug-has-test Status: This bug is tracked inside the repo by a `known-bug` test. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
#134334 opened Dec 15, 2024 by matthiaskrgr
1
Tracking issue for release notes of #133374: show abi_unsupported_vector_types lint in future breakage reports A-ABI Area: Concerning the application binary interface (ABI) A-lints Area: Lints (warnings about flaws in source code) such as unused_mut. A-SIMD Area: SIMD (Single Instruction Multiple Data) A-target-feature Area: Enabling/disabling target features like AVX, Neon, etc. L-abi_unsupported_vector_types Lint: abi_unsupported_vector_types relnotes Marks issues that should be documented in the release notes of the next release. relnotes-tracking-issue Marks issues tracking what text to put in release notes. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. T-lang Relevant to the language team, which will review and decide on the PR/issue.
#133376 opened Nov 23, 2024 by rustbot
1 of 3 tasks
1.85.0
2
[LoongArch] SIMD intrinsics not fully inlined in caller with target feature globally enabled A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. A-SIMD Area: SIMD (Single Instruction Multiple Data) C-bug Category: This is a bug. llvm-fixed-upstream Issue expected to be fixed by the next major LLVM upgrade, or backported fixes O-loongarch Target: LoongArch (LA32R, LA32S, LA64) T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
#133281 opened Nov 21, 2024 by heiher
5
How should we handle dynamic vector ABIs? A-ABI Area: Concerning the application binary interface (ABI) A-SIMD Area: SIMD (Single Instruction Multiple Data) E-needs-design This issue needs exploration and design to see how and if we can fix/implement it O-AArch64 Armv8-A or later processors in AArch64 mode O-riscv Target: RISC-V architecture T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
#133146 opened Nov 17, 2024 by workingjubilee
How should we handle SPARC's vector ABI? A-ABI Area: Concerning the application binary interface (ABI) A-SIMD Area: SIMD (Single Instruction Multiple Data) E-needs-design This issue needs exploration and design to see how and if we can fix/implement it O-SPARC Target: SPARC processors T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
#133141 opened Nov 17, 2024 by workingjubilee
1
Support calling functions with SIMD vectors that couldn't be used in the caller A-ABI Area: Concerning the application binary interface (ABI) A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. A-SIMD Area: SIMD (Single Instruction Multiple Data) C-feature-request Category: A feature request, i.e: not implemented / a PR. T-opsem Relevant to the opsem team WG-llvm Working group: LLVM backend code generation
#132865 opened Nov 10, 2024 by RalfJung
get_unchecked() is never inlined on armv7-unknown-linux-gnueabihf in functions with #[target_feature(enable = "neon")] A-codegen Area: Code generation A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. A-SIMD Area: SIMD (Single Instruction Multiple Data) A-target-feature Area: Enabling/disabling target features like AVX, Neon, etc. C-bug Category: This is a bug. I-slow Issue: Problems and improvements with respect to performance of generated code. O-Arm Target: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 state T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
#131745 opened Oct 15, 2024 by hkratz
1
s390x vector facilities support A-ABI Area: Concerning the application binary interface (ABI) A-inline-assembly Area: Inline assembly (`asm!(…)`) A-SIMD Area: SIMD (Single Instruction Multiple Data) O-SystemZ Target: SystemZ processors (s390x) T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. T-libs Relevant to the library team, which will review and decide on the PR/issue.
#130869 opened Sep 26, 2024 by taiki-e
6 of 11 tasks
10
Internal SIMD layout specification is not flexible enough for SPIR-V A-align Area: alignment control (`repr(align(N))` and so on) A-repr Area: the `#[repr(stuff)]` attribute A-SIMD Area: SIMD (Single Instruction Multiple Data) PG-portable-simd Project group: Portable SIMD (https://github.com/rust-lang/project-portable-simd) T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
#130405 opened Sep 15, 2024 by fu5ha
4
When a type is #[repr(simd)], #[repr(align(N))] annotations are ignored. A-align Area: alignment control (`repr(align(N))` and so on) A-repr Area: the `#[repr(stuff)]` attribute A-SIMD Area: SIMD (Single Instruction Multiple Data) C-bug Category: This is a bug. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
#130402 opened Sep 15, 2024 by fu5ha
1
2
Weird AVX 512 code generated with std::simd when using -Zbuild-std A-codegen Area: Code generation A-SIMD Area: SIMD (Single Instruction Multiple Data) C-bug Category: This is a bug. PG-portable-simd Project group: Portable SIMD (https://github.com/rust-lang/project-portable-simd) T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
#129293 opened Aug 20, 2024 by cvijdea-bd
1
Tracking Issue for AVX512_FP16 intrinsics A-SIMD Area: SIMD (Single Instruction Multiple Data) C-tracking-issue Category: An issue tracking the progress of sth. like the implementation of an RFC O-x86_32 Target: x86 processors, 32 bit (like i686-*) O-x86_64 Target: x86-64 processors (like x86_64-*) T-libs-api Relevant to the library API team, which will review and decide on the PR/issue.
#127213 opened Jul 1, 2024 by sayantn
2 tasks
Tracking Issue for XOP target feature A-SIMD Area: SIMD (Single Instruction Multiple Data) A-target-feature Area: Enabling/disabling target features like AVX, Neon, etc. C-tracking-issue Category: An issue tracking the progress of sth. like the implementation of an RFC O-x86_32 Target: x86 processors, 32 bit (like i686-*) O-x86_64 Target: x86-64 processors (like x86_64-*)
#127208 opened Jul 1, 2024 by sayantn
1 of 3 tasks
2
Wrong codegen for simd_select_bitmask on big-endian targets A-codegen Area: Code generation A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. A-SIMD Area: SIMD (Single Instruction Multiple Data) C-bug Category: This is a bug. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
#127205 opened Jul 1, 2024 by RalfJung
2
Tracking Issue for sha512_sm_x86 A-SIMD Area: SIMD (Single Instruction Multiple Data) A-target-feature Area: Enabling/disabling target features like AVX, Neon, etc. C-tracking-issue Category: An issue tracking the progress of sth. like the implementation of an RFC
#126624 opened Jun 18, 2024 by sayantn
2 of 4 tasks
Tracking Issue for x86_amx_intrinsics A-SIMD Area: SIMD (Single Instruction Multiple Data) A-target-feature Area: Enabling/disabling target features like AVX, Neon, etc. C-tracking-issue Category: An issue tracking the progress of sth. like the implementation of an RFC
#126622 opened Jun 18, 2024 by sayantn
1 of 3 tasks
3
What should SIMD bitmasks look like? A-SIMD Area: SIMD (Single Instruction Multiple Data) C-discussion Category: Discussion or questions that doesn't represent real issues. PG-portable-simd Project group: Portable SIMD (https://github.com/rust-lang/project-portable-simd) T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. T-opsem Relevant to the opsem team
#126217 opened Jun 10, 2024 by RalfJung
6
Add SIMD operations that use f16 and f128 A-SIMD Area: SIMD (Single Instruction Multiple Data) C-feature-request Category: A feature request, i.e: not implemented / a PR. E-help-wanted Call for participation: Help is requested to fix this issue. F-f16_and_f128 `#![feature(f16)]`, `#![feature(f128)]` T-libs Relevant to the library team, which will review and decide on the PR/issue.
#125440 opened May 23, 2024 by tgross35
8
Performance regression: rustc failed to optimize _mm256_avg_epu8 after 1.75.0 A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. A-SIMD Area: SIMD (Single Instruction Multiple Data) C-bug Category: This is a bug. E-needs-bisection Call for participation: This issue needs bisection: https://github.com/rust-lang/cargo-bisect-rustc I-heavy Issue: Problems and improvements with respect to binary size of generated code. I-slow Issue: Problems and improvements with respect to performance of generated code. P-medium Medium priority regression-from-stable-to-stable Performance or correctness regression from one stable version to another. T-libs Relevant to the library team, which will review and decide on the PR/issue.
#124216 opened Apr 21, 2024 by Nugine
11
WASM+simd128 codegen of a.simd_eq(Simd::splat(b)).any() deteriorates as width increases A-codegen Area: Code generation A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. A-SIMD Area: SIMD (Single Instruction Multiple Data) C-optimization Category: An issue highlighting optimization opportunities or PRs implementing such I-heavy Issue: Problems and improvements with respect to binary size of generated code. I-slow Issue: Problems and improvements with respect to performance of generated code. O-wasm Target: WASM (WebAssembly), http://webassembly.org/ PG-portable-simd Project group: Portable SIMD (https://github.com/rust-lang/project-portable-simd) requires-nightly This issue requires a nightly compiler in some way. S-has-mcve Status: A Minimal Complete and Verifiable Example has been found for this issue
#122623 opened Mar 17, 2024 by alion02
2
portable_simd bitmask + select generates poor code on ARM64 A-codegen Area: Code generation A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. A-SIMD Area: SIMD (Single Instruction Multiple Data) C-bug Category: This is a bug. C-optimization Category: An issue highlighting optimization opportunities or PRs implementing such I-heavy Issue: Problems and improvements with respect to binary size of generated code. I-slow Issue: Problems and improvements with respect to performance of generated code. O-AArch64 Armv8-A or later processors in AArch64 mode PG-portable-simd Project group: Portable SIMD (https://github.com/rust-lang/project-portable-simd) T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. T-libs Relevant to the library team, which will review and decide on the PR/issue.
#122376 opened Mar 12, 2024 by orlp
1
Strange register allocation causes slowdown A-SIMD Area: SIMD (Single Instruction Multiple Data) C-bug Category: This is a bug. PG-portable-simd Project group: Portable SIMD (https://github.com/rust-lang/project-portable-simd) T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
#121529 opened Feb 23, 2024 by SeeSpring
1
Confusing error when using simd_masked_load with the wrong type A-diagnostics Area: Messages for errors, warnings, and lints A-SIMD Area: SIMD (Single Instruction Multiple Data) T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
#119210 opened Dec 22, 2023 by RalfJung
3
Rust cannot pass a vector constant directly to LLVM A-SIMD Area: SIMD (Single Instruction Multiple Data) C-bug Category: This is a bug.
#118209 opened Nov 23, 2023 by GeorgeWort
1
14
Tracking Issue for 32-bit ARM DSP intrinsics A-SIMD Area: SIMD (Single Instruction Multiple Data) C-tracking-issue Category: An issue tracking the progress of sth. like the implementation of an RFC O-Arm Target: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 state T-libs-api Relevant to the library API team, which will review and decide on the PR/issue.
#117237 opened Oct 26, 2023 by Amanieu
3 tasks
1
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