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Support vfp5 target feature #127449

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@boozook

Description

ARM Cortex-M7 has vfp5, according to documentation - 1 and 2.

LLVM already has it, see llvm/llvm-project#95053 (FPUVersion::VFPV5).

Seems to rustc doesn't supports it, throwing message

'+vfp5' is not a recognized feature for this target (ignoring feature)

Could be great to support vfp5 in the rustc ❤️‍🔥


Oh I see that there is vfp4d16sp feature. Am I right? Maybe could be good to create alias for it as vfp5?

// Cortex-M7 (vfp5).
// Both the Cortex-M4 and the Cortex-M7 only have 16 double-precision registers
// available, and the Cortex-M4 only supports single-precision floating point operations
// whereas in the Cortex-M7 double-precision is optional.
//
// Reference:
// ARMv7-M Architecture Reference Manual - A2.5 The optional floating-point extension
features: "+vfp4d16sp".into(),

Also I see features

  • vfp4d16 - VFP4 instructions with only 16 d-registers
  • vfp4d16sp - VFP4 instructions with only 16 d-registers and no double precision
  • vfp4sp - VFP4 instructions with no double precision

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    A-target-featureArea: Enabling/disabling target features like AVX, Neon, etc.C-feature-requestCategory: A feature request, i.e: not implemented / a PR.O-ArmTarget: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 stateT-compilerRelevant to the compiler team, which will review and decide on the PR/issue.

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