From 16eb5139f16afc99365e68fd01d95c3647a66932 Mon Sep 17 00:00:00 2001
From: Rui Ueyama <ruiu@cs.stanford.edu>
Date: Wed, 2 Oct 2024 19:57:03 +0900
Subject: [PATCH] [RISC-V] Set DT_RISCV_VARIANT_CC if there's a dynamic symbol
 with STO_RISCV_VARIANT_CC

---
 src/elf.h                       | 24 ++++++++++++++++++++----
 src/output-chunks.cc            | 16 ++++++++++++++++
 test/arch-riscv64-variant-cc.sh | 21 +++++++++++++++++++++
 3 files changed, 57 insertions(+), 4 deletions(-)
 create mode 100755 test/arch-riscv64-variant-cc.sh

diff --git a/src/elf.h b/src/elf.h
index 64bcdccbdd..ae17132a4b 100644
--- a/src/elf.h
+++ b/src/elf.h
@@ -296,6 +296,7 @@ enum : u32 {
   DT_VERNEEDNUM = 0x6fffffff,
   DT_PPC_GOT = 0x70000000,
   DT_PPC64_GLINK = 0x70000000,
+  DT_RISCV_VARIANT_CC = 0x70000001,
   DT_AARCH64_VARIANT_PCS = 0x70000005,
   DT_AUXILIARY = 0x7ffffffd,
   DT_FILTER = 0x7fffffff,
@@ -1488,6 +1489,10 @@ struct ElfSym<E> {
       u8 : 7;
       u8 arm64_variant_pcs : 1;
     };
+    struct {
+      u8 : 7;
+      u8 riscv_variant_cc : 1;
+    };
     struct {
       u8 : 5;
       u8 ppc64_local_entry : 3;
@@ -1502,6 +1507,7 @@ struct ElfSym<E> {
       u8 st_visibility : 2;
     };
     u8 arm64_variant_pcs : 1;
+    u8 riscv_variant_cc : 1;
     u8 ppc64_local_entry : 3;
   };
 #endif
@@ -1526,13 +1532,23 @@ struct ElfSym<E> {
 #ifdef __LITTLE_ENDIAN__
   u8 st_type : 4;
   u8 st_bind : 4;
-  u8 st_visibility : 2;
-  u8 : 6;
+  union {
+    u8 st_visibility : 2;
+    struct {
+      u8 : 7;
+      u8 riscv_variant_cc : 1;
+    };
+  };
 #else
   u8 st_bind : 4;
   u8 st_type : 4;
-  u8 : 6;
-  u8 st_visibility : 2;
+  union {
+    struct {
+      u8 : 6;
+      u8 st_visibility : 2;
+    };
+    u8 riscv_variant_cc : 1;
+  };
 #endif
 
   U16<E> st_shndx;
diff --git a/src/output-chunks.cc b/src/output-chunks.cc
index 408183f03e..9a30c81dcb 100644
--- a/src/output-chunks.cc
+++ b/src/output-chunks.cc
@@ -674,6 +674,15 @@ static bool contains_variant_pcs(Context<ARM64> &ctx) {
   return false;
 }
 
+// RISC-V has the same feature but with different names.
+template <is_riscv E>
+static bool contains_variant_cc(Context<E> &ctx) {
+  for (Symbol<E> *sym : ctx.plt->symbols)
+    if (sym->esym().riscv_variant_cc)
+      return true;
+  return false;
+}
+
 template <typename E>
 static std::vector<Word<E>> create_dynamic_section(Context<E> &ctx) {
   std::vector<Word<E>> vec;
@@ -827,6 +836,10 @@ static std::vector<Word<E>> create_dynamic_section(Context<E> &ctx) {
     if (contains_variant_pcs(ctx))
       define(DT_AARCH64_VARIANT_PCS, 0);
 
+  if constexpr (is_riscv<E>)
+    if (contains_variant_cc(ctx))
+      define(DT_RISCV_VARIANT_CC, 0);
+
   if constexpr (is_ppc32<E>)
     define(DT_PPC_GOT, ctx.gotplt->shdr.sh_addr);
 
@@ -1768,6 +1781,9 @@ ElfSym<E> to_output_esym(Context<E> &ctx, Symbol<E> &sym, u32 st_name,
   if constexpr (is_arm64<E>)
     esym.arm64_variant_pcs = sym.esym().arm64_variant_pcs;
 
+  if constexpr (is_riscv<E>)
+    esym.riscv_variant_cc = sym.esym().riscv_variant_cc;
+
   if constexpr (is_ppc64v2<E>)
     esym.ppc64_local_entry = sym.esym().ppc64_local_entry;
 
diff --git a/test/arch-riscv64-variant-cc.sh b/test/arch-riscv64-variant-cc.sh
new file mode 100755
index 0000000000..af6a268312
--- /dev/null
+++ b/test/arch-riscv64-variant-cc.sh
@@ -0,0 +1,21 @@
+#!/bin/bash
+. $(dirname $0)/common.inc
+
+cat <<EOF | $CC -c -o $t/a.o -fPIC -xassembler - 2> /dev/null || skip
+.global foo
+.type foo, %function
+.variant_cc foo
+foo:
+  ret
+EOF
+
+$CC -B. -shared -o $t/b.so $t/a.o
+readelf -W --dyn-syms $t/b.so | grep foo | grep -Fq '[VARIANT_CC]'
+
+cat <<EOF | $CC -c -o $t/c.o -xc -
+void foo();
+int main() { foo(); }
+EOF
+
+$CC -B. -o $t/exe $t/c.o $t/b.so
+readelf -W --dynamic $t/exe | grep -q RISCV_VARIANT_CC