Update README.md

TheRiscGuy · Sep 9, 2022 · e21bfc3 · e21bfc3
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@@ -37,7 +37,7 @@ An enhanced yet simplified version of the original RISC-V-Computer.
 ## CPU <a name="cpu"></a>
 
 	Completely redesigned, the new simplified design has a smaller footprint.
-	Based on Von Neumann architecture and both CPUs implements the RV32IM extensions.              
+	Based on Von Neumann architecture both CPUs implements the RV32IM extensions.              
 	it also features hold-hold acknowledge mechanism for DMA support
 	When the hld pin is asserted the CPU sets the hlda signal if it's not currently executing
 	any memory related instruction.