risc-v/esp32c3: Reorder register restoration on interrupt handler epi…

…loque
psanyi · Apr 28, 2021 · 27d32f4 · 27d32f4
1 parent 66a15a6
commit 27d32f4
Showing 1 changed file with 1 addition and 3 deletions.
diff --git a/arch/risc-v/src/esp32c3/esp32c3_interrupt.S b/arch/risc-v/src/esp32c3/esp32c3_interrupt.S
@@ -130,7 +130,7 @@ _interrupt_handler:
   lw   s0,  32*4(sp)  /* restore mstatus */
   csrw mstatus, s0
 
-
+  lw   x1,  1*4(sp)  /* ra */
   lw   x4,  4*4(sp)  /* tp */
   lw   x5,  5*4(sp)  /* t0 */
   lw   x6,  6*4(sp)  /* t1 */
@@ -160,8 +160,6 @@ _interrupt_handler:
   lw  x30, 30*4(sp)  /* t5 */
   lw  x31, 31*4(sp)  /* t6 */
 
-  lw  x1,  1*4(sp)   /* ra */
-
   lw  sp,  2*4(sp)  /* restore original sp */
 
   /* Return from Machine Interrupt */