from1.0: fix register type signess

p4lang · Mar 9, 2022 · a2365cd · a2365cd
1 parent 2ab374f
commit a2365cd
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Showing 7 changed files with 385 additions and 1 deletion.
diff --git a/frontends/p4/fromv1.0/programStructure.cpp b/frontends/p4/fromv1.0/programStructure.cpp
@@ -2063,7 +2063,7 @@ ProgramStructure::convert(const IR::Register* reg, cstring newName,
             regElementType = new IR::Type_Name(new IR::Path(str->name));
         // use provided type
     } else if (reg->width > 0) {
-        regElementType = IR::Type_Bits::get(reg->width);
+        regElementType = IR::Type_Bits::get(reg->width, reg->signed_);
     } else if (reg->layout) {
         cstring newName = ::get(registerLayoutType, reg->layout);
         if (newName.isNullOrEmpty())

diff --git a/testdata/p4_14_samples/register_signed.p4 b/testdata/p4_14_samples/register_signed.p4
@@ -0,0 +1,58 @@
+header_type ethernet_t {
+    fields {
+        dstAddr : 48;
+        srcAddr : 48;
+        etherType : 16;
+    }
+}
+
+header_type intrinsic_metadata_t {
+    fields {
+    }
+}
+
+header_type meta_t {
+    fields {
+        register_tmp : 32 (signed);
+    }
+}
+
+metadata meta_t meta;
+
+parser start {
+    return parse_ethernet;
+}
+
+header ethernet_t ethernet;
+metadata intrinsic_metadata_t intrinsic_metadata;
+
+parser parse_ethernet {
+    extract(ethernet);
+    return ingress;
+}
+
+register my_register {
+    width: 32;
+    static: m_table;
+    attributes: signed;
+}
+
+action m_action(register_idx) {
+    register_read(meta.register_tmp, my_register, register_idx);
+}
+
+table m_table {
+    reads {
+        ethernet.srcAddr : exact;
+    }
+    actions {
+        m_action;
+    }
+}
+
+control ingress {
+    apply(m_table);
+}
+
+control egress {
+}
diff --git a/testdata/p4_14_samples_outputs/register_signed-first.p4 b/testdata/p4_14_samples_outputs/register_signed-first.p4
@@ -0,0 +1,81 @@
+#include <core.p4>
+#define V1MODEL_VERSION 20200408
+#include <v1model.p4>
+
+struct intrinsic_metadata_t {
+}
+
+struct meta_t {
+    int<32> register_tmp;
+}
+
+header ethernet_t {
+    bit<48> dstAddr;
+    bit<48> srcAddr;
+    bit<16> etherType;
+}
+
+struct metadata {
+    @name(".meta") 
+    meta_t meta;
+}
+
+struct headers {
+    @name(".ethernet") 
+    ethernet_t ethernet;
+}
+
+parser ParserImpl(packet_in packet, out headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    @name(".parse_ethernet") state parse_ethernet {
+        packet.extract<ethernet_t>(hdr.ethernet);
+        transition accept;
+    }
+    @name(".start") state start {
+        transition parse_ethernet;
+    }
+}
+
+control egress(inout headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    apply {
+    }
+}
+
+@name(".my_register") register<int<32>, bit<32>>(32w4294967295) my_register;
+
+control ingress(inout headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    @name(".m_action") action m_action(bit<32> register_idx) {
+        my_register.read(meta.meta.register_tmp, register_idx);
+    }
+    @name(".m_table") table m_table {
+        actions = {
+            m_action();
+            @defaultonly NoAction();
+        }
+        key = {
+            hdr.ethernet.srcAddr: exact @name("ethernet.srcAddr") ;
+        }
+        default_action = NoAction();
+    }
+    apply {
+        m_table.apply();
+    }
+}
+
+control DeparserImpl(packet_out packet, in headers hdr) {
+    apply {
+        packet.emit<ethernet_t>(hdr.ethernet);
+    }
+}
+
+control verifyChecksum(inout headers hdr, inout metadata meta) {
+    apply {
+    }
+}
+
+control computeChecksum(inout headers hdr, inout metadata meta) {
+    apply {
+    }
+}
+
+V1Switch<headers, metadata>(ParserImpl(), verifyChecksum(), ingress(), egress(), computeChecksum(), DeparserImpl()) main;
+
diff --git a/testdata/p4_14_samples_outputs/register_signed-frontend.p4 b/testdata/p4_14_samples_outputs/register_signed-frontend.p4
@@ -0,0 +1,83 @@
+#include <core.p4>
+#define V1MODEL_VERSION 20200408
+#include <v1model.p4>
+
+struct intrinsic_metadata_t {
+}
+
+struct meta_t {
+    int<32> register_tmp;
+}
+
+header ethernet_t {
+    bit<48> dstAddr;
+    bit<48> srcAddr;
+    bit<16> etherType;
+}
+
+struct metadata {
+    @name(".meta") 
+    meta_t meta;
+}
+
+struct headers {
+    @name(".ethernet") 
+    ethernet_t ethernet;
+}
+
+parser ParserImpl(packet_in packet, out headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    @name(".parse_ethernet") state parse_ethernet {
+        packet.extract<ethernet_t>(hdr.ethernet);
+        transition accept;
+    }
+    @name(".start") state start {
+        transition parse_ethernet;
+    }
+}
+
+control egress(inout headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    apply {
+    }
+}
+
+@name(".my_register") register<int<32>, bit<32>>(32w4294967295) my_register;
+
+control ingress(inout headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    @noWarn("unused") @name(".NoAction") action NoAction_1() {
+    }
+    @name(".m_action") action m_action(@name("register_idx") bit<32> register_idx) {
+        my_register.read(meta.meta.register_tmp, register_idx);
+    }
+    @name(".m_table") table m_table_0 {
+        actions = {
+            m_action();
+            @defaultonly NoAction_1();
+        }
+        key = {
+            hdr.ethernet.srcAddr: exact @name("ethernet.srcAddr") ;
+        }
+        default_action = NoAction_1();
+    }
+    apply {
+        m_table_0.apply();
+    }
+}
+
+control DeparserImpl(packet_out packet, in headers hdr) {
+    apply {
+        packet.emit<ethernet_t>(hdr.ethernet);
+    }
+}
+
+control verifyChecksum(inout headers hdr, inout metadata meta) {
+    apply {
+    }
+}
+
+control computeChecksum(inout headers hdr, inout metadata meta) {
+    apply {
+    }
+}
+
+V1Switch<headers, metadata>(ParserImpl(), verifyChecksum(), ingress(), egress(), computeChecksum(), DeparserImpl()) main;
+
diff --git a/testdata/p4_14_samples_outputs/register_signed-midend.p4 b/testdata/p4_14_samples_outputs/register_signed-midend.p4
@@ -0,0 +1,82 @@
+#include <core.p4>
+#define V1MODEL_VERSION 20200408
+#include <v1model.p4>
+
+struct intrinsic_metadata_t {
+}
+
+struct meta_t {
+    int<32> register_tmp;
+}
+
+header ethernet_t {
+    bit<48> dstAddr;
+    bit<48> srcAddr;
+    bit<16> etherType;
+}
+
+struct metadata {
+    int<32> _meta_register_tmp0;
+}
+
+struct headers {
+    @name(".ethernet") 
+    ethernet_t ethernet;
+}
+
+parser ParserImpl(packet_in packet, out headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    @name(".parse_ethernet") state parse_ethernet {
+        packet.extract<ethernet_t>(hdr.ethernet);
+        transition accept;
+    }
+    @name(".start") state start {
+        transition parse_ethernet;
+    }
+}
+
+control egress(inout headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    apply {
+    }
+}
+
+@name(".my_register") register<int<32>, bit<32>>(32w4294967295) my_register;
+
+control ingress(inout headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    @noWarn("unused") @name(".NoAction") action NoAction_1() {
+    }
+    @name(".m_action") action m_action(@name("register_idx") bit<32> register_idx) {
+        my_register.read(meta._meta_register_tmp0, register_idx);
+    }
+    @name(".m_table") table m_table_0 {
+        actions = {
+            m_action();
+            @defaultonly NoAction_1();
+        }
+        key = {
+            hdr.ethernet.srcAddr: exact @name("ethernet.srcAddr") ;
+        }
+        default_action = NoAction_1();
+    }
+    apply {
+        m_table_0.apply();
+    }
+}
+
+control DeparserImpl(packet_out packet, in headers hdr) {
+    apply {
+        packet.emit<ethernet_t>(hdr.ethernet);
+    }
+}
+
+control verifyChecksum(inout headers hdr, inout metadata meta) {
+    apply {
+    }
+}
+
+control computeChecksum(inout headers hdr, inout metadata meta) {
+    apply {
+    }
+}
+
+V1Switch<headers, metadata>(ParserImpl(), verifyChecksum(), ingress(), egress(), computeChecksum(), DeparserImpl()) main;
+
diff --git a/testdata/p4_14_samples_outputs/register_signed.p4 b/testdata/p4_14_samples_outputs/register_signed.p4
@@ -0,0 +1,79 @@
+#include <core.p4>
+#define V1MODEL_VERSION 20200408
+#include <v1model.p4>
+
+struct intrinsic_metadata_t {
+}
+
+struct meta_t {
+    int<32> register_tmp;
+}
+
+header ethernet_t {
+    bit<48> dstAddr;
+    bit<48> srcAddr;
+    bit<16> etherType;
+}
+
+struct metadata {
+    @name(".meta") 
+    meta_t meta;
+}
+
+struct headers {
+    @name(".ethernet") 
+    ethernet_t ethernet;
+}
+
+parser ParserImpl(packet_in packet, out headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    @name(".parse_ethernet") state parse_ethernet {
+        packet.extract(hdr.ethernet);
+        transition accept;
+    }
+    @name(".start") state start {
+        transition parse_ethernet;
+    }
+}
+
+control egress(inout headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    apply {
+    }
+}
+
+@name(".my_register") register<int<32>, bit<32>>(32w4294967295) my_register;
+
+control ingress(inout headers hdr, inout metadata meta, inout standard_metadata_t standard_metadata) {
+    @name(".m_action") action m_action(bit<32> register_idx) {
+        my_register.read(meta.meta.register_tmp, (bit<32>)register_idx);
+    }
+    @name(".m_table") table m_table {
+        actions = {
+            m_action;
+        }
+        key = {
+            hdr.ethernet.srcAddr: exact;
+        }
+    }
+    apply {
+        m_table.apply();
+    }
+}
+
+control DeparserImpl(packet_out packet, in headers hdr) {
+    apply {
+        packet.emit(hdr.ethernet);
+    }
+}
+
+control verifyChecksum(inout headers hdr, inout metadata meta) {
+    apply {
+    }
+}
+
+control computeChecksum(inout headers hdr, inout metadata meta) {
+    apply {
+    }
+}
+
+V1Switch(ParserImpl(), verifyChecksum(), ingress(), egress(), computeChecksum(), DeparserImpl()) main;
+
diff --git a/testdata/p4_14_samples_outputs/register_signed.p4-stderr b/testdata/p4_14_samples_outputs/register_signed.p4-stderr
@@ -0,0 +1 @@
+[--Wwarn=mismatch] warning: -32w1: negative value with unsigned type
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1 @@
		[--Wwarn=mismatch] warning: -32w1: negative value with unsigned type