[GPU] Revert onednn (#28028)

### Details:
 - Some perf regression was observed from next-gen GPU

### Tickets:
 - 159200

[NPUW] Fix bank weak_ptr (#27486)

After `CompiledModel` object is deleted, `shared_ptr<Bank>` is reset -
thus expiring `weak_ptr` in bank manager class. If we try to create a
`CompiledModel` object again with the same bank name - it was trying to
utilize already empty bank ptr. This PR fixes such case

Docs Fix for 24 with footer (#26765)

### Details:
 - *item1*
 - *...*

### Tickets:
 - *ticket-id*

[GPU] Fix lack of support for 3D (and smaller) shapes in TransposeFus…

…ion pass (#26440)

### Details:
- Fix lack of support for 3D (and smaller) shapes in TransposeFusion
pass
- Update IncreasePositionIdsPrecision to support both MatMul and Gemm
operations

### Tickets:
 - [CVS-146889](https://jira.devtools.intel.com/browse/CVS-146889)

[GPU] Fix regression by selection of reference MatMul (#25633)

+ Resolve unexpected input of dynamic shape from Reshape

### Details:
 - *item1*
 - *...*

### Tickets:
 - 147083

---------

Signed-off-by: Min, Byung-il <byungil.min@intel.com>

[GPU][ROIAlignRotated]: Fixed a bug with wrong batch indexing and add…

…ed functional test for the op (#24736)

This is a follow up to #23955

### Details:
 - Added functional test for ROI Align Rotated
- Fixed a "bug" with wrong batch index inside cl kernel revealed by
functional test for ROI Align Rotated.

### Tickets:
 - *[141877](https://jira.devtools.intel.com/browse/CVS-141877)*

[GPU] Fixed eltwise fusing check in onednn case (#24469)

### Details:
 - *Fix for #24308

Disable add_output_performance test (#24376)

### Details:
 - Disable add_output_performance test

### Tickets:
 - CVS-140440
 - CVS-140158
 - CVS-134286

Checkout OMZ (#24169)

### Details:
- according to Trivia reports still unsecure version of tf was
installed. Update OMZ reqs, which had upperbound 2.9.3

### Tickets:
 - CVS-138225

[PyOV] Limit numpy major version (#24131)

### Details:
 - Backport of #24103

### Tickets:
 - N/A

Co-authored-by: Michal Lukaszewski <michal.lukaszewski@intel.com>