Merge branch 'main' into patch-1

motaionx · Jan 10, 2022 · 98bbaf3 · 98bbaf3
2 parents 735f2a0 + fd1e903
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diff --git a/.gitignore b/.gitignore
@@ -0,0 +1 @@
+.idea/
diff --git a/FAQ/第一回FAQ.md b/FAQ/第一回FAQ.md
@@ -18,4 +18,19 @@
 ![image](https://user-images.githubusercontent.com/25787738/141405471-44a45263-df37-418a-bc47-3bf1f3729f64.png)
 
 ### CPU 刚启动时为什么能直接访问 BIOS 的代码？
-@解答人：ShengHui
+可以分两部分来解释：1.CPU的硬件通路可以直接访问BIOS的地址。2.CPU复位后的硬件地址在BIOS所在的地址。  
+首先解释1。在设计CPU时会把CPU可以访问的地址进行划分，包括片内的ram，寄存器等，和片外的ROM，DDR，其他外设等。当CPU访问这些被提前划分好的地址时，会有不同的手段。比如对于 `UINT32 a=*(volatile UINT32)0x1000;` 来说，如果`0x1000`地址被分配至片内ram，则CPU会通过片内总线读取这段地址，如果被分配至片外，则会通过相应的总线进行访问。BIOS通常指代存在BIOS芯片中的程序，而BIOS芯片实际上就是一个ROM存储器，大部分是FLASH，BIOS程序由厂商固化至其中。CPU的硬件通路可直接通过外设总线（通常是SPI）访问其中内容。  
+再来解释2。CPU在上电复位后一定是从一个确定的地址启动，该地址（在PC机的结构下）被分配至BIOS所在的地址，并由内部硬件逻辑控制。其他类型的CPU可能会被分配至其他片内/片外存储器上，如51在0地址启动，MIPS大多在`0xBF400000`,不同的CPU复位启动地址可能会不同。 如果想了解更多可继续向下看，本人也不专业，仅做原理说明。   
+咨询了一下大佬，硬件复位逻辑EDA的实现大致如下：
+```
+always@(negedge rstn or posedeg clk)
+ if(~rst)
+  begin
+   reg<=0;
+  end
+ else
+  begin
+   reg<=wire;
+  end
+```
+简单解释下就是，当芯片复位（假设高有效）之前，寄存器会被赋一个初值，且如果RST没有被放开则所有的逻辑都会被强制拉住，不会有任何动作。RST有效之后，硬件逻辑才会开始工作，对于CPU来讲就从指令地址寄存器（已被初始化）中取到第一个指令的地址，如果从这个地址拿到了有效指令，那么就开始一条一条的跑下去了。因而可以看到，硬件复位地址完全由设计人员决定，不必太过于纠结为何如此，仅需参考芯片手册即可。  
diff --git a/Intel 手册中文版/卷一：基本架构.md b/Intel 手册中文版/卷一：基本架构.md
diff --git a/README.md b/README.md
@@ -37,12 +37,26 @@
 
 * **第一部分：进入内核前的苦力活**
 
-   * [第一回 最开始的两行代码](https://mp.weixin.qq.com/s/LIsqRX51W7d_yw-HN-s2DA)
-   * [第二回 自己给自己挪个地儿](https://mp.weixin.qq.com/s/U-txDYt0YqLh5EeFOcB4NQ)
-   * [第三回 做好最最基础的准备工作](https://mp.weixin.qq.com/s/90QBJ-lP_-du2qQJxNF-Fw)
+   * [第1回 最开始的两行代码](https://mp.weixin.qq.com/s/LIsqRX51W7d_yw-HN-s2DA)
+   * [第2回 自己给自己挪个地儿](https://mp.weixin.qq.com/s/U-txDYt0YqLh5EeFOcB4NQ)
+   * [第3回 做好最最基础的准备工作](https://mp.weixin.qq.com/s/90QBJ-lP_-du2qQJxNF-Fw)
+   * [第4回 把自己在硬盘里的其他部分也放到内存来](https://mp.weixin.qq.com/s/hStc-y-sabP-KwJUDUesTw)
+   * [第5回 进入保护模式前的最后一次折腾内存](https://mp.weixin.qq.com/s/5s_nmrWRZbA_4mkNKOQ2Cg)
+   * [第6回 先解决段寄存器的历史包袱问题](https://mp.weixin.qq.com/s/p1a6QxYZyMpJF__uBSE1Kg)
+   * [第7回 六行代码就进入了保护模式](https://mp.weixin.qq.com/s/S5zarr9BmLhUHAmdmeNypA)
+   * [第8回 烦死了又要重新设置一遍 idt 和 gdt](https://mp.weixin.qq.com/s/ssQKFMehxZxWT9i6mdRtXg)
+   * [第9回 Intel 内存管理两板斧：分段与分页](https://mp.weixin.qq.com/s/q2wU9IbX54t_GAuc9V5r7A)
+   * [第10回 进入 main 函数前的最后一跃！](https://mp.weixin.qq.com/s/ISyaX5zPWRw_d-9zvZUPUg)
+   * [第一部分总结与回顾](https://mp.weixin.qq.com/s/8bP3feeF_A13j7ysWur_JQ)
 
 * **第二部分：大战前期的初始化工作**
 
+   * [第11回 整个操作系统就20几行代码](https://mp.weixin.qq.com/s/kYBrMgHt7C9EmAcwJIPIxg)
+   * [第12回 管理内存前先划分出三个边界值](https://mp.weixin.qq.com/s/eoBFcgm0QrHOVi_WoS7PwA)
+   * [第13回 主内存初始化 mem_init](https://mp.weixin.qq.com/s/_rTmjHIDCV9ADiJlfo5B3g)
+   * [第14回 中断初始化 trap_init](https://mp.weixin.qq.com/s/sFp_388qRncB-jpJeRzCGQ)
+   * [第15回 块设备请求项初始化 blk_dev_init](https://mp.weixin.qq.com/s/pIbVY1XPCktxGogc4lI1Bw)
+
 * **第三部分：一个新进程的诞生**
 
 * **第四部分：shell 程序的到来**

diff --git a/一些非必要的资料/x86-interrupt-list/README.md b/一些非必要的资料/x86-interrupt-list/README.md
@@ -0,0 +1,85 @@
+x86 中断函数列表
+
+一开始从 stackoverflow 上找到这个网站：
+[http://www.ctyme.com/intr/int.htm](http://www.ctyme.com/intr/int.htm)
+
+但是没找到下载地址，所以又搜了下找到了这个网站[Public Files on FTP.CS.CMU.EDU](https://www.cs.cmu.edu/~ralf/files.html)
+
+目录和文件（可按文本格式打开）按照字母序，比如 `inter61a/INTERRUP.A` 包含了 `INT 00` 到 `INT 10`
+
+文中会对指令作出较为详细的描述，以 [最近一篇文章中](https://mp.weixin.qq.com/s/hStc-y-sabP-KwJUDUesTw)的
+[INT 13](https://github.com/sunym1993/flash-linux0.11-talk/blob/547ef4b440ff2ed1be2204e459316a39e9a734fc/%E4%B8%80%E4%BA%9B%E9%9D%9E%E5%BF%85%E8%A6%81%E7%9A%84%E8%B5%84%E6%96%99/linux-0.11/boot/bootsect.s#L71) 
+为例, 可以看到给 `AX` 赋值了 `#0x0200+SETUPLEN -> #0x0204` 即 `AH=02`
+
+```assembly
+mov	ax,#0x0200+SETUPLEN	; service 2, nr of sectors
+int	0x13
+
+jnc	ok_load_setup		; ok - continue
+```
+
+对应在 `inter61a/INTERRUP.B` 找到如下描述，可知 `CF` 用来做错误位设置，clear 时标志成功，
+自然猜测接下来的 `jnc` 指令就是为了检查 READ SECTOR(S) INTO MEMORY 这一操作是否成功。
+
+```shell
+INT 13 - DISK - READ SECTOR(S) INTO MEMORY
+	AH = 02h
+	AL = number of sectors to read (must be nonzero)
+	CH = low eight bits of cylinder number
+	CL = sector number 1-63 (bits 0-5)
+	     high two bits of cylinder (bits 6-7, hard disk only)
+	DH = head number
+	DL = drive number (bit 7 set for hard disk)
+	ES:BX -> data buffer
+Return: CF set on error
+	    if AH = 11h (corrected ECC error), AL = burst length
+	CF clear if successful
+	AH = status (see #00234)
+	AL = number of sectors transferred (only valid if CF set for some
+	      BIOSes)
+Notes:	errors on a floppy may be due to the motor failing to spin up quickly
+	  enough; the read should be retried at least three times, resetting
+	  the disk with AH=00h between attempts
+	most BIOSes support "multitrack" reads, where the value in AL
+	  exceeds the number of sectors remaining on the track, in which
+	  case any additional sectors are read beginning at sector 1 on
+	  the following head in the same cylinder; the MSDOS CONFIG.SYS command
+	  MULTITRACK (or the Novell DOS DEBLOCK=) can be used to force DOS to
+	  split disk accesses which would wrap across a track boundary into two
+	  separate calls
+	the IBM AT BIOS and many other BIOSes use only the low four bits of
+	  DH (head number) since the WD-1003 controller which is the standard
+	  AT controller (and the controller that IDE emulates) only supports
+	  16 heads
+	AWARD AT BIOS and AMI 386sx BIOS have been extended to handle more
+	  than 1024 cylinders by placing bits 10 and 11 of the cylinder number
+	  into bits 6 and 7 of DH
+	under Windows95, a volume must be locked (see INT 21/AX=440Dh/CX=084Bh)
+	  in order to perform direct accesses such as INT 13h reads and writes
+	all versions of MS-DOS (including MS-DOS 7 [Windows 95]) have a bug
+	  which prevents booting on hard disks with 256 heads (FFh), so many
+	  modern BIOSes provide mappings with at most 255 (FEh) heads
+	some cache drivers flush their buffers when detecting that DOS is
+	  bypassed by directly issuing INT 13h from applications.  A dummy
+	  read can be used as one of several methods to force cache
+	  flushing for unknown caches (e.g. before rebooting).
+BUGS:	When reading from floppies, some AMI BIOSes (around 1990-1991) trash
+	  the byte following the data buffer, if it is not arranged to an even
+	  memory boundary.  A workaround is to either make the buffer word
+	  aligned (which may also help to speed up things), or to add a dummy
+	  byte after the buffer.
+	MS-DOS may leave interrupts disabled on return from this function.
+	Apparently some BIOSes or intercepting resident software have bugs
+	  that may destroy DX on return or not properly set the Carry flag.
+	  At least some Microsoft software frames calls to this function with
+	  PUSH DX, STC, INT 13h, STI, POP DX.
+	on the original IBM AT BIOS (1984/01/10) this function does not disable
+	  interrupts for harddisks (DL >= 80h).	 On these machines the MS-DOS/
+	  PC DOS IO.SYS/IBMBIO.COM installs a special filter to bypass the
+	  buggy code in the ROM (see CALL F000h:211Eh)
+SeeAlso: AH=03h,AH=0Ah,AH=06h"V10DISK.SYS",AH=21h"PS/1",AH=42h"IBM"
+SeeAlso: INT 21/AX=440Dh/CX=084Bh,INT 4D/AH=02h
+
+# ···
+
+```