Fork of OpenOCD that has RISC-V support

Spen's Official OpenOCD Mirror

Arduino Uno template project for KiCad EDA

A Sound Detection and Classification System

The Open Source Hardware Accelerator for Efficient Neural Network Inference

Example application code for running a SensiML Knowledge Pack on Arduino boards, for the Nano33 BLE Sense

SensiML's open-source AutoML solution for Edge AI model development

Virtual whiteboard for sketching hand-drawn like diagrams

Discourse Themes & Theme Components directory.

A Dockerfile with a collections of ready to use open source EDA tools: Yosys, SimbiYosys (with Z3, boolector and Yices2), nextpnr-ice40, netxpnr-ecp5, nextpnr-gowin, Amaranth HDL, Silice and Verila…

Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or SoC design without using a physical cable.

Docker image with Xilinx FPGA Tools (Vivado - SDAccel) usable with GUI on Mac

Installs Vivado on M1/M2/M3 macs

HW Design Collateral for Caliptra RoT IP

Simple, Versatile, Yours

CodiMD - Realtime collaborative markdown notes on all platforms.

Create a searx instance using Docker

CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)

Open-source high-performance RISC-V processor

Deep learning toolkit-enabled VLSI placement

The data used for my paper "Recent Developments in Low-Power AI Accelerators: A Survey".

The Hailo Model Zoo includes pre-trained models and a full building and evaluation environment

Reinforcement learning assisted analog layout design flow.

DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization (ASPDAC'20)