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Plan for upstream? #5

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jerome-pouiller opened this issue Sep 2, 2023 · 2 comments
Open

Plan for upstream? #5

jerome-pouiller opened this issue Sep 2, 2023 · 2 comments

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@jerome-pouiller
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jerome-pouiller commented Sep 2, 2023 •
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Hello,

Do you plan to submit your work to the official OpenOCD project? Do you need some help on that topic?
@jerome-pouiller jerome-pouiller changed the title Plan to upstream Plan for upstream? Sep 2, 2023
@knieriem
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Hello,

so far there hasn't been a plan to submit these changes to uptream. This project started two years ago as a quick hack to get flash functionality working for a small firmware project on a EFM32PG22, based on the series0/1 driver. To ensure that I do not lose the changes, and that others could possibly use it as a starting point, I created this repository. It has been clear to me that to integrate a solution for series 2 controllers upstream, a different quality would be needed. Due to a lack of resources, I'm currently not able to do the missing steps, or to coordinate that work.

Some points I think could be worth considering:

  • Is it acceptable to provide the series 2 functionality as a separate driver, as it has been done by this project, or would it be preferable to merge it with the series0/1 functionality into the original driver efm32.c, extending/cleaning up structures where needed (?)

  • The xG23 variants use flash base address 0x0800_0000, the xG22 0x0000_0000.
    At the moment a different config file has to be used (_g23 suffix). It should be checked if a solution can be found where the base address, which the driver already knows, does not need to be specified redundantly by the config file.

  • Which other differences exist between series 2 variants that need to be addressed?

I have not used locking, and the security functionality of the series 2 chips yet. It should be checked if there is something that needs to be taken into account with regard to the flash driver.

Perhaps I'm seeing it too complicated, and in reality it is not much what is needed to integrate it upstream (just copying efm32s2.c into the source tree, doing some further cleanup of series0/series1 leftovers?).

@jerome-pouiller
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Is it acceptable to provide the series 2 functionality as a separate driver, as it has been done by this project, or would it be preferable to merge it with the series0/1 functionality into the original driver efm32.c, extending/cleaning up structures where needed (?)

If I understand right, on series 0/1, it was possible to probe the start address using the DeviceInfo structure. On series 2, we have to probe the part and use a conversion table to get the start address.
I believe it would be nice to merge this driver with the existing one. However, the behavior would be different enough.
So the final conclusion depends if you think you can safely merge this code or if you think there is a real risk to break everything.

The xG23 variants use flash base address 0x0800_0000, the xG22 0x0000_0000.

Here is the full database defined in Segger JLink v782c:

<DataBase>
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32X21X000F1024XM32_SECPU" Core="JLINK_CORE_CORTEX_M0" WorkRAMAddr="0x10000000" WorkRAMSize="0x4000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG21_SECPU/EFR32X21X000F1024XM32_SECPU.JLinkScript" Aliases="EFR32XG21X000F1024IM32_SECPU"/>
        <FlashBankInfo Name="Main SE Flash" BaseAddr="0x8FE00000" MaxSize="0x30000" Loader="Devices/SiliconLabs/EFR32XG21_SECPU/EFR32X21X000F1024XM32_SECPU.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
        <FlashBankInfo Name="M33 Flash" BaseAddr="0x80000000" MaxSize="0x100000" Loader="Devices/SiliconLabs/EFR32XG21_SECPU/EFR32X21X000F1024XM32_SECPU_main.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG21X000F1024" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x14000" Aliases="RM21Z000F1024;EFR32MG21B020F1024;EFR32XG21Y000F1024;EFR32XG21X000F1024IM32;EFR32X21X000F1024XM32" />
    <FlashBankInfo Name="M33 Flash" BaseAddr="0x00000000" MaxSize="0x100000" Loader="Devices/SiliconLabs/EFR32XG21/Series2.elf" AlwaysPresent="1" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <!-- Locked EFR32XG22 device -->
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG22X000F512" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG22/XG22.jlinkscript" Aliases="EFR32XG22X000F512GM40;EFR32MG22A224F512" />
    <FlashBankInfo Name="M33 Flash" BaseAddr="0x00000000" MaxSize="0x80000" Loader="Devices/SiliconLabs/EFR32XG22/Series2.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
    <FlashBankInfo Name="Userdata"  BaseAddr="0x0FE00000" MaxSize="0x400" Loader="Devices/SiliconLabs/EFR32XG22/Series2UD.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <!-- Unlocked EFR32XG22 device -->
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG22X000F512_UNLOCKED" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG22/EFR32XG22_unlocked.JLinkScript" />
    <FlashBankInfo Name="OTP Flash" BaseAddr="0x0FE00000" MaxSize="0x24000" Loader="Devices/SiliconLabs/EFR32XG22/EFR32XG22RootCodeFlashloader.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
    <FlashBankInfo Name="Main Flash" BaseAddr="0x00000000" MaxSize="0x80000" Loader="Devices/SiliconLabs/EFR32XG22/Series2.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <!-- Ocelot EFR32XG23 -->
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG23A000F512" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG23/EFR32XG23.JLinkScript" Aliases="EFR32XG23A000F512GM40;EFR32FG23A010F512GM48;EFR32FG23A011F512GM48;EFR32ZG23A010F512GM48;EFR32xx23A010F512GM48;EFR32XG23AxxxF512;EFR32FG23AxxxF512;EFR32ZG23AxxxF512;EFR32FG23BxxxF512;EFR32ZG23BxxxF512;" />
    <FlashBankInfo Name="M33 Flash" BaseAddr="0x08000000" MaxSize="0x80000" Loader="Devices/SiliconLabs/EFR32XG23/Series2_ocelot.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
    <FlashBankInfo Name="Userdata" BaseAddr="0x0fe00000" MaxSize="0x400" Loader="Devices/SiliconLabs/EFR32XG23/Series2UD.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG23A000F512GM40_SECPU" Core="JLINK_CORE_CORTEX_M0" WorkRAMAddr="0x10000000" WorkRAMSize="0x4000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG23/EFR32XG23SE.JLinkScript" />
    <FlashBankInfo Name="User Flash" BaseAddr="0x08000000" MaxSize="0x80000" Loader="Devices/SiliconLabs/EFR32XG23/EFR32XG23_SE_user.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
    <FlashBankInfo Name="SE OTP Flash" BaseAddr="0x0FE10000" MaxSize="0x4000" Loader="Devices/SiliconLabs/EFR32XG23/EFR32XG23_SE_otp.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
    <FlashBankInfo Name="SE Root Flash" BaseAddr="0x09000000" MaxSize="0x20000" Loader="Devices/SiliconLabs/EFR32XG23/EFR32XG23_SE_root.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <!-- Bobcat EFR32XG24 -->
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG24A000F1024_FPGA" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG24/EFR32XG24_FPGA.JLinkScript" />
    <FlashBankInfo Name="M33 Flash" BaseAddr="0x08000000" MaxSize="0x80000" Loader="Devices/SiliconLabs/EFR32XG24/EFR32XG24.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG24A000F1024" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG24/EFR32XG24.JLinkScript" Aliases="EFR32XG24A000F1024GM40;EFR32XG24XFULL;EFR32XG24A020F1536GM48;EFR32XG24AxxxF1024;EFR32MG24A010F1536GM48;EFR32MG24AxxxF1536;EFR32BG24AxxxF1536;EFR32FG24AxxxF1536;EFR32XG24AxxxF1536;EFR32BG24BxxxF1536;EFR32FG24BxxxF1536;" />
    <FlashBankInfo Name="M33 Flash" BaseAddr="0x08000000" MaxSize="0x180000" Loader="Devices/SiliconLabs/EFR32XG24/Series2_bobcat.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG24A000F1024GM40_SECPU" Core="JLINK_CORE_CORTEX_M0" WorkRAMAddr="0x20000000" WorkRAMSize="0x4000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG24/EFR32XG24SE.JLinkScript" Aliases="EFR32XG24XFULL_SECPU;EFR32XG24A000F1536GM40_SECPU"/>
    <FlashBankInfo Name="User Flash" BaseAddr="0x00000000" MaxSize="0x180000" Loader="Devices/SiliconLabs/EFR32XG24/EFR32XG24_SE_user.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
    <FlashBankInfo Name="SE OTP Flash" BaseAddr="0x0FE10000" MaxSize="0x4000" Loader="Devices/SiliconLabs/EFR32XG24/EFR32XG24_SE_otp.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
    <FlashBankInfo Name="SE Root Flash" BaseAddr="0x09000000" MaxSize="0x20000" Loader="Devices/SiliconLabs/EFR32XG24/EFR32XG24_SE_root.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <!-- Sol EFR32XG25 -->
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG25A000F512_FPGA" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG25/EFR32XG25_FPGA.JLinkScript" />
    <FlashBankInfo Name="M33 Flash" BaseAddr="0x08000000" MaxSize="0x80000" Loader="Devices/SiliconLabs/EFR32XG25/EFR32XG25.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG25A000F1920" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG25/EFR32XG25.JLinkScript" Aliases="EFR32XG25A000F1920GM56;EFR32XG25XFULL;EFR32XG25AxxxF1920;EFR32FG25B222F1920IM56;EFR32XG25B000F1920IM56" />
    <FlashBankInfo Name="M33 Flash" BaseAddr="0x08000000" MaxSize="0x1E0000" Loader="Devices/SiliconLabs/EFR32XG25/Series2_sol.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG25XFULL_SECPU" Core="JLINK_CORE_CORTEX_M0" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG25/EFR32XG25_SE.JLinkScript" Aliases="EFR32XG25A000F1920_SECPU" />
    <FlashBankInfo Name="M33 Flash" BaseAddr="0x08000000" MaxSize="0x1E0000" Loader="Devices/SiliconLabs/EFR32XG25/EFR32XG25.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <!-- Leopard EFR32XG27 -->
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG27A000F512_FPGA" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG27/EFR32XG27_FPGA.JLinkScript"/>
    <FlashBankInfo Name="M33 Flash" BaseAddr="0x08000000" MaxSize="0x80000" Loader="Devices/SiliconLabs/EFR32XG27/EFR32XG27.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG27A000F768" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG27/EFR32XG27.JLinkScript" Aliases="EFR32XG27XFULL;EFR32XG27X000F768GM40" />
    <FlashBankInfo Name="M33 Flash" BaseAddr="0x08000000" MaxSize="0xC0000" Loader="Devices/SiliconLabs/EFR32XG27/Series2_leopard.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
  <!-- Margay EFR32XG28 -->
  <Device>
    <ChipInfo Vendor="Silicon Labs" Name="EFR32XG28B000F1024" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000" JLinkScriptFile="Devices/SiliconLabs/EFR32XG28/EFR32XG28.JLinkScript" Aliases="EFR32XG28XFULL;EFR32XG28B000F1024IM68" />
    <FlashBankInfo Name="M33 Flash" BaseAddr="0x08000000" MaxSize="0x100000" Loader="Devices/SiliconLabs/EFR32XG28/Series2_margay_fpga.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
    <FlashBankInfo Name="Userdata" BaseAddr="0x0fe00000" MaxSize="0x400" Loader="Devices/SiliconLabs/EFR32XG28/Series2UD.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
</DataBase>

Which other differences exist between series 2 variants that need to be addressed?

I don't see any important miss.

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@knieriem @jerome-pouiller