sunxi: Set clock rate in the driver

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
jujiaqi · Jul 9, 2018 · bbdba6a · bbdba6a
1 parent 9ad9462
commit bbdba6a
Showing 1 changed file with 7 additions and 0 deletions.
diff --git a/patches/0005-mali-Add-sunxi-platform.patch b/patches/0005-mali-Add-sunxi-platform.patch
@@ -326,6 +326,13 @@ Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
 +		goto err_free_mem_region;
 +	}
 +
++	if (of_device_is_compatible(np, "allwinner,sun8i-h3-mali") ||
++	    of_device_is_compatible(np, "allwinner,sun50i-h5-mali"))
++		clk_set_rate(mali->core_clk, 576000000);
++	else if (of_device_is_compatible(np, "allwinner,sun7i-a20-mali") ||
++		 of_device_is_compatible(np, "allwinner,sun8i-a23-mali"))
++		clk_set_rate(mali->core_clk, 384000000);
++
 +	clk_register_clkdev(mali->core_clk, "clk_mali", NULL);
 +
 +	ret = platform_device_add_resources(mali->dev, mali_res, len);