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U Type Instruction description doesn't need left shift by 12 #27

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iammadab opened this issue Dec 3, 2024 · 1 comment
Open

U Type Instruction description doesn't need left shift by 12 #27

iammadab opened this issue Dec 3, 2024 · 1 comment

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@iammadab
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iammadab commented Dec 3, 2024

image

Given the image above the u-type immediate takes instruction[31:12] and places it at immediate[31:12], this implies the lowest 12 bits are already zeros (implicit left shift by 12).

This means lui and auipc descriptions can be reduced to the following:

// lui
rd = imm

// auipc
rd = PC + imm 

instead of:
image

Another potential solution is to change the immediate builder description

instruction[31:12] -> immediate[19:0]
@jameslzhu
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I believe this ambiguity is the result of the immediate being encoded differently in the asm syntax and the instruction, in GNU / LLVM implementations. This was previously discussed here: riscv/riscv-isa-manual#452

The assembly syntax doesn't match the notation used in the ISA spec. This is unfortunate, but changing it would be too disruptive at this point. Concretely, lui rd, 0x1 writes the value 0x1000 to rd.
[...]
I was referring to syntax used by the GNU/LLVM assemblers, which the spec should also strive to match.

Also, the immediate builder description is copied directly from the ISA manual source. I would prefer not to change that (instruction[31:12] -> immediate[19:0]).

Would it be better to rename the C description immediate to ui_const to distinguish it from imm? The MIT RISCV course resolves this ambiguity this way.

// lui rd, ui_const
rd = ui_const << 12

// auipc rd, ui_const
rd = PC + (ui_const << 12)

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