topology: add a "core" parameter to the W_PCM_CAPTURE() macro

This places all SectionWidget.PCM*C topology widgets, created by the W_PCM_CAPTURE macro on the same core, on which the respective pipeline is scheduled. Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
iganakov · Apr 8, 2020 · 40e68e2 · 40e68e2
1 parent 7282958
commit 40e68e2
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Showing 22 changed files with 24 additions and 23 deletions.
diff --git a/tools/topology/m4/pcm.m4 b/tools/topology/m4/pcm.m4
@@ -2,7 +2,7 @@ divert(-1)
 
 dnl Define the macro for PCM playback/capture/capabilities
 
-dnl PCM name)
+dnl N_PCM(name)
 define(`N_PCMP', `PCM'$1`P')
 define(`N_PCMC', `PCM'$1`C')
 
@@ -31,13 +31,14 @@ define(`W_PCM_PLAYBACK',
 `}')
 
 
-dnl W_PCM_CAPTURE(pcm, stream, periods_sink, periods_source)
+dnl W_PCM_CAPTURE(pcm, stream, periods_sink, periods_source, core)
 define(`W_PCM_CAPTURE',
 `SectionVendorTuples."'N_PCMC($1)`_tuples_w_comp" {'
 `	tokens "sof_comp_tokens"'
 `	tuples."word" {'
 `		SOF_TKN_COMP_PERIOD_SINK_COUNT'		STR($3)
 `		SOF_TKN_COMP_PERIOD_SOURCE_COUNT'	STR($4)
+`		SOF_TKN_COMP_CORE_ID'			STR($5)
 `	}'
 `}'
 `SectionData."'N_PCMC($1)`_data_w_comp" {'

diff --git a/tools/topology/sof/pipe-asrc-capture.m4 b/tools/topology/sof/pipe-asrc-capture.m4
@@ -18,7 +18,7 @@ include(`pipeline.m4')
 
 # Host "ASRC Capture" PCM
 # with 0 sink and 3 source periods
-W_PCM_CAPTURE(PCM_ID, ASRC Capture, 0, 3)
+W_PCM_CAPTURE(PCM_ID, ASRC Capture, 0, 3, SCHEDULE_CORE)
 
 #
 # ASRC Configuration

diff --git a/tools/topology/sof/pipe-asrc-volume-capture.m4 b/tools/topology/sof/pipe-asrc-volume-capture.m4
@@ -45,7 +45,7 @@ W_DATA(MY_PGA_CONF, MY_PGA_TOKENS)
 
 # Host "Passthrough Capture" PCM
 # with 0 sink and 3 source periods
-W_PCM_CAPTURE(PCM_ID, ASRC Capture, 0, 3)
+W_PCM_CAPTURE(PCM_ID, ASRC Capture, 0, 3, SCHEDULE_CORE)
 
 #
 # ASRC Configuration

diff --git a/tools/topology/sof/pipe-dcblock-capture.m4 b/tools/topology/sof/pipe-dcblock-capture.m4
@@ -19,7 +19,7 @@ include(`dcblock.m4')
 
 # Host "DC Block Capture" PCM
 # with 0 sink and 3 source periods
-W_PCM_CAPTURE(PCM_ID, DC Block Capture, 0, 3)
+W_PCM_CAPTURE(PCM_ID, DC Block Capture, 0, 3, SCHEDULE_CORE)
 
 define(DCBLOCK_priv, concat(`dcblock_bytes_', PIPELINE_ID))
 define(MY_DCBLOCK_CTRL, concat(`dcblock_control_', PIPELINE_ID))

diff --git a/tools/topology/sof/pipe-eq-fir-capture.m4 b/tools/topology/sof/pipe-eq-fir-capture.m4
@@ -44,7 +44,7 @@ C_CONTROLBYTES(MY_CONTROLBYTES, PIPELINE_ID,
 
 # Host "EQ FIR Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, EQ FIR Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, EQ FIR Capture, 0, 2, SCHEDULE_CORE)
 
 # "EQ 0" has 2 sink period and x source periods
 W_EQ_FIR(0, PIPELINE_FORMAT, 2, DAI_PERIODS, LIST(`		', "MY_CONTROLBYTES"))

diff --git a/tools/topology/sof/pipe-eq-fir-volume-capture.m4 b/tools/topology/sof/pipe-eq-fir-volume-capture.m4
@@ -72,7 +72,7 @@ C_CONTROLBYTES(DEF_EQFIR_COEF, PIPELINE_ID,
 
 # Host "Passthrough Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2, SCHEDULE_CORE)
 
 # "Volume" has 2 sink and 2 source periods
 W_PGA(0, PIPELINE_FORMAT, 2, 2, DEF_PGA_CONF, SCHEDULE_CORE,

diff --git a/tools/topology/sof/pipe-eq-iir-capture.m4 b/tools/topology/sof/pipe-eq-iir-capture.m4
@@ -44,7 +44,7 @@ C_CONTROLBYTES(DEF_EQIIR_COEF, PIPELINE_ID,
 
 # Host "EQ IIR Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, EQ IIR Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, EQ IIR Capture, 0, 2, SCHEDULE_CORE)
 
 # "EQ 0" has 2 sink period and x source periods
 W_EQ_IIR(0, PIPELINE_FORMAT, 2, DAI_PERIODS, LIST(`		', "DEF_EQIIR_COEF"))

diff --git a/tools/topology/sof/pipe-eq-iir-volume-capture-16khz.m4 b/tools/topology/sof/pipe-eq-iir-volume-capture-16khz.m4
@@ -69,7 +69,7 @@ C_CONTROLBYTES(DEF_EQIIR_COEF, PIPELINE_ID,
 
 # Host "Highpass Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Highpass Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, Highpass Capture, 0, 2, SCHEDULE_CORE)
 
 # "Volume" has 2 source and 2 sink periods
 W_PGA(0, PIPELINE_FORMAT, 2, 2, DEF_PGA_CONF, SCHEDULE_CORE,

diff --git a/tools/topology/sof/pipe-eq-iir-volume-capture.m4 b/tools/topology/sof/pipe-eq-iir-volume-capture.m4
@@ -85,7 +85,7 @@ C_CONTROLBYTES(DEF_EQIIR_COEF, PIPELINE_ID,
 
 # Host "Highpass Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Highpass Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, Highpass Capture, 0, 2, SCHEDULE_CORE)
 
 # "Volume" has 2 source and 2 sink periods
 W_PGA(0, PIPELINE_FORMAT, 2, 2, DEF_PGA_CONF, SCHEDULE_CORE,

diff --git a/tools/topology/sof/pipe-highpass-capture.m4 b/tools/topology/sof/pipe-highpass-capture.m4
@@ -72,7 +72,7 @@ C_CONTROLBYTES(DEF_EQIIR_COEF, PIPELINE_ID,
 
 # Host "Highpass Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Highpass Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, Highpass Capture, 0, 2, SCHEDULE_CORE)
 
 # "Volume" has 2 sink and 2 source periods
 W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, DEF_PGA_CONF, SCHEDULE_CORE,

diff --git a/tools/topology/sof/pipe-highpass-switch-capture.m4 b/tools/topology/sof/pipe-highpass-switch-capture.m4
@@ -81,7 +81,7 @@ C_CONTROLBYTES(DEF_EQIIR_COEF, PIPELINE_ID,
 
 # Host "Highpass Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Highpass Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, Highpass Capture, 0, 2, SCHEDULE_CORE)
 
 # "Volume" has 2 sink and 2 source periods
 W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, DEF_PGA_CONF, SCHEDULE_CORE,

diff --git a/tools/topology/sof/pipe-kfbm-capture.m4 b/tools/topology/sof/pipe-kfbm-capture.m4
@@ -50,7 +50,7 @@ C_CONTROLBYTES(KPB, PIPELINE_ID,
 
 # Host "Passthrough Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Sound Trigger Capture, 0, 2, 2)
+W_PCM_CAPTURE(PCM_ID, Sound Trigger Capture, 0, 2, 2, SCHEDULE_CORE)
 
 # "KPBM" has 2 source and 2 sink periods
 W_KPBM(0, PIPELINE_FORMAT, 2, 2, PIPELINE_ID, LIST(`             ', "KPB"))

diff --git a/tools/topology/sof/pipe-low-latency-capture.m4 b/tools/topology/sof/pipe-low-latency-capture.m4
@@ -39,7 +39,7 @@ W_DATA(capture_pga_conf, capture_pga_tokens)
 
 # Host "Low Latency Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Low Latency Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, Low Latency Capture, 0, 2, SCHEDULE_CORE)
 
 # "Capture Volume" has 2 sink and x source periods for host and DAI ping-pong
 W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, capture_pga_conf, SCHEDULE_CORE,

diff --git a/tools/topology/sof/pipe-passthrough-capture-sched.m4 b/tools/topology/sof/pipe-passthrough-capture-sched.m4
@@ -17,7 +17,7 @@ include(`pipeline.m4')
 
 # Host "Passthrough Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, DAI_PERIODS)
+W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, DAI_PERIODS, SCHEDULE_CORE)
 
 # Capture Buffers
 W_BUFFER(0, COMP_BUFFER_SIZE(DAI_PERIODS,

diff --git a/tools/topology/sof/pipe-passthrough-capture.m4 b/tools/topology/sof/pipe-passthrough-capture.m4
@@ -17,7 +17,7 @@ include(`pipeline.m4')
 
 # Host "Passthrough Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, DAI_PERIODS)
+W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, DAI_PERIODS, SCHEDULE_CORE)
 
 # Capture Buffers
 W_BUFFER(0, COMP_BUFFER_SIZE(DAI_PERIODS,

diff --git a/tools/topology/sof/pipe-src-capture.m4 b/tools/topology/sof/pipe-src-capture.m4
@@ -18,7 +18,7 @@ include(`dai.m4')
 
 # Host "SRC Capture" PCM
 # with 0 sink and 3 source periods
-W_PCM_CAPTURE(PCM_ID, SRC Capture, 0, 3)
+W_PCM_CAPTURE(PCM_ID, SRC Capture, 0, 3, SCHEDULE_CORE)
 
 #
 # SRC Configuration

diff --git a/tools/topology/sof/pipe-src-volume-capture.m4 b/tools/topology/sof/pipe-src-volume-capture.m4
@@ -44,7 +44,7 @@ W_DATA(MY_PGA_CONF, MY_PGA_TOKENS)
 
 # Host "Passthrough Capture" PCM
 # with 0 sink and 3 source periods
-W_PCM_CAPTURE(PCM_ID, SRC Capture, 0, 3)
+W_PCM_CAPTURE(PCM_ID, SRC Capture, 0, 3, SCHEDULE_CORE)
 
 #
 # SRC Configuration

diff --git a/tools/topology/sof/pipe-vol-kfbm-capture.m4 b/tools/topology/sof/pipe-vol-kfbm-capture.m4
@@ -69,7 +69,7 @@ W_DATA(capture_pga_conf, capture_pga_tokens)
 
 # Host "Passthrough Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Sound Trigger Capture, 0, 2, 2)
+W_PCM_CAPTURE(PCM_ID, Sound Trigger Capture, 0, 2, SCHEDULE_CORE)
 
 # "Volume" has x source and 2 sink periods
 W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, capture_pga_conf, SCHEDULE_CORE,

diff --git a/tools/topology/sof/pipe-volume-capture-16khz.m4 b/tools/topology/sof/pipe-volume-capture-16khz.m4
@@ -44,7 +44,7 @@ W_DATA(playback_pga_conf, playback_pga_tokens)
 
 # Host "Passthrough Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2, SCHEDULE_CORE)
 
 # "Volume" has x source and 2 sink periods
 W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, playback_pga_conf, SCHEDULE_CORE,

diff --git a/tools/topology/sof/pipe-volume-capture-sched.m4 b/tools/topology/sof/pipe-volume-capture-sched.m4
@@ -31,7 +31,7 @@ C_CONTROLMIXER(Master Capture Volume, PIPELINE_ID,
 
 # Host "Passthrough Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2, SCHEDULE_CORE)
 
 # "Volume" has x source and 2 sink periods
 W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, SCHEDULE_CORE,

diff --git a/tools/topology/sof/pipe-volume-capture.m4 b/tools/topology/sof/pipe-volume-capture.m4
@@ -41,7 +41,7 @@ W_DATA(capture_pga_conf, capture_pga_tokens)
 
 # Host "Passthrough Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2, SCHEDULE_CORE)
 
 # "Volume" has x source and 2 sink periods
 W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, capture_pga_conf, SCHEDULE_CORE,

diff --git a/tools/topology/sof/pipe-volume-switch-capture.m4 b/tools/topology/sof/pipe-volume-switch-capture.m4
@@ -50,7 +50,7 @@ W_DATA(capture_pga_conf, capture_pga_tokens)
 
 # Host "Passthrough Capture" PCM
 # with 0 sink and 2 source periods
-W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2)
+W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2, SCHEDULE_CORE)
 
 # "Volume" has x source and 2 sink periods
 W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, capture_pga_conf, SCHEDULE_CORE,