Bootloader binary incorporation (electro-smith#431)

* Added latest bootloader binary * Added target for flashing the bootloader * Added linkers for bootloaded programs * Added note to change log * Made BOOT_BIN var assignable in project
ifranco · Nov 8, 2021 · 934e733 · 934e733
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commit 934e733
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diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -6,6 +6,8 @@
 
 ### Features
 
+* bootloader: the bootloader can now be flashed directly from libDaisy using `make program-boot`
+
 ### Bug fixes
 
 * patch_sm: corrected the order of the gate out pins

diff --git a/core/Makefile b/core/Makefile
@@ -4,6 +4,7 @@ CHIPSET ?= stm32h7x
 
 TARGET_BIN=$(TARGET).bin
 TARGET_ELF=$(TARGET).elf
+BOOT_BIN ?= $(wildcard $(SYSTEM_FILES_DIR)/dsy_bootloader*)
 FLASH_ADDRESS ?= 0x08000000
 QSPI_ADDRESS  ?= 0x90040000
 
@@ -287,6 +288,9 @@ program-dfu:
 program-app:
 	dfu-util -a 0 -s $(QSPI_ADDRESS):leave -D $(BUILD_DIR)/$(TARGET_BIN) -d ,0483:df11
 
+program-boot:
+	dfu-util -a 0 -s $(FLASH_ADDRESS):leave -D $(BOOT_BIN) -d ,0483:df11
+
 #######################################
 # dependencies
 #######################################

diff --git a/core/STM32H750IB_qspi.lds b/core/STM32H750IB_qspi.lds
@@ -0,0 +1,256 @@
+/* Generated by LinkerScriptGenerator [http://visualgdb.com/tools/LinkerScriptGenerator]
+ * Target: STM32H750IB
+ * The file is provided under the BSD license.
+ * yeah okay but i also modified it a lot so like, give me some credit too mr BSD
+ */
+
+ENTRY(Reset_Handler)
+
+MEMORY
+{
+	FLASH (RX)    : ORIGIN = 0x08000000, LENGTH = 128K
+	DTCMRAM (RWX) : ORIGIN = 0x20000000, LENGTH = 128K
+	SRAM (RWX)    : ORIGIN = 0x24000000, LENGTH = 512K
+	RAM_D2_DMA (RWX) : ORIGIN = 0x30000000, LENGTH = 32K
+	RAM_D2 (RWX)  : ORIGIN = 0x30008000, LENGTH = 256K
+	RAM_D3 (RWX)  : ORIGIN = 0x38000000, LENGTH = 64K
+	ITCMRAM (RWX) : ORIGIN = 0x00000000, LENGTH = 64K
+	SDRAM (RWX)   : ORIGIN = 0xc0000000, LENGTH = 64M
+  QSPIFLASH (RX): ORIGIN = 0x90040000, LENGTH = 7936K
+}
+
+_estack = 0x20020000;
+
+SECTIONS
+{
+	.isr_vector :
+	{
+		. = ALIGN(4);
+		KEEP(*(.isr_vector))
+		. = ALIGN(4);
+	} > QSPIFLASH
+
+	.text :
+	{
+		. = ALIGN(4);
+		_stext = .;
+
+		*(.text)
+		*(.text*)
+		*(.rodata)
+		*(.rodata*)
+		*(.glue_7)
+		*(.glue_7t)
+		KEEP(*(.init))
+		KEEP(*(.fini))
+		. = ALIGN(4);
+		_etext = .;
+
+	} > QSPIFLASH
+
+	.ARM.extab :
+	{
+		. = ALIGN(4);
+		*(.ARM.extab)
+		*(.gnu.linkonce.armextab.*)
+		. = ALIGN(4);
+	} > QSPIFLASH
+
+	.exidx :
+	{
+		. = ALIGN(4);
+		PROVIDE(__exidx_start = .);
+		*(.ARM.exidx*)
+		. = ALIGN(4);
+		PROVIDE(__exidx_end = .);
+	} > QSPIFLASH
+
+	.ARM.attributes :
+	{
+		*(.ARM.attributes)
+	} > QSPIFLASH
+
+	.preinit_array :
+	{
+		PROVIDE(__preinit_array_start = .);
+		KEEP(*(.preinit_array*))
+		PROVIDE(__preinit_array_end = .);
+	} > QSPIFLASH
+
+	.init_array :
+	{
+		PROVIDE(__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array*))
+		PROVIDE(__init_array_end = .);
+	} > QSPIFLASH
+
+	.fini_array :
+	{
+		PROVIDE(__fini_array_start = .);
+		KEEP(*(.fini_array*))
+		KEEP(*(SORT(.fini_array.*)))
+		PROVIDE(__fini_array_end = .);
+	} > QSPIFLASH
+
+	.sram1_bss (NOLOAD) :
+	{
+		. = ALIGN(4);
+		_ssram1_bss = .;
+
+		PROVIDE(__sram1_bss_start__ = _sram1_bss);
+		*(.sram1_bss)
+		*(.sram1_bss*)
+		. = ALIGN(4);
+		_esram1_bss = .;
+
+		PROVIDE(__sram1_bss_end__ = _esram1_bss);
+	} > RAM_D2_DMA
+
+	.data :
+	{
+		. = ALIGN(4);
+		_sdata = .;
+
+		PROVIDE(__data_start__ = _sdata);
+		*(.data)
+		*(.data*)
+		. = ALIGN(4);
+		_edata = .;
+
+		PROVIDE(__data_end__ = _edata);
+	} > SRAM AT > QSPIFLASH
+
+	_sidata = LOADADDR(.data);
+
+	.bss (NOLOAD) :
+	{
+		. = ALIGN(4);
+		_sbss = .;
+
+		PROVIDE(__bss_start__ = _sbss);
+		*(.bss)
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		_ebss = .;
+
+		PROVIDE(__bss_end__ = _ebss);
+	} > SRAM 
+
+	.dtcmram_bss (NOLOAD) :
+	{
+		. = ALIGN(4);
+		_sdtcmram_bss = .;
+
+		PROVIDE(__dtcmram_bss_start__ = _sdtcmram_bss);
+		*(.dtcmram_bss)
+		*(.dtcmram_bss*)
+		. = ALIGN(4);
+		_edtcmram_bss = .;
+
+		PROVIDE(__dtcmram_bss_end__ = _edtcmram_bss);
+	} > DTCMRAM
+
+	/*
+	.sdram_text :
+	{
+		. = ALIGN(4);
+		_ssdram_text = .;
+
+		PROVIDE(__sdram_text_start = _ssdram_text);
+		*(.sdram_text)
+		*(.sdram_text*)
+		. = ALIGN(4);
+		_esdram_text = .;
+
+		PROVIDE(__sdram_text_end = _esdram_text);
+	} > SDRAM AT >FLASH
+	_sisdram_text = LOADADDR(.sdram_text);
+	*/
+
+	.sdram_bss (NOLOAD) :
+	{
+		. = ALIGN(4);
+		_ssdram_bss = .;
+
+		PROVIDE(__sdram_bss_start = _ssdram_bss);
+		*(.sdram_bss)
+		*(.sdram_bss*)
+		. = ALIGN(4);
+		_esdram_bss = .;
+
+		PROVIDE(__sdram_bss_end = _esdram_bss);
+	} > SDRAM
+
+
+    /* .qspiflash_text :
+	{
+		. = ALIGN(4);
+		_sqspiflash_text = .;
+
+		PROVIDE(__qspiflash_text_start = _sqspiflash_text);
+		*(.qspiflash_text)
+		*(.qspiflash_text*)
+		. = ALIGN(4);
+		_eqspiflash_text = .;
+
+		PROVIDE(__qspiflash_text_end = _eqspiflash_text);
+	} > QSPIFLASH
+
+	.qspiflash_data :
+	{
+		. = ALIGN(4);
+		_sqspiflash_data = .;
+
+		PROVIDE(__qspiflash_data_start = _sqspiflash_data);
+		*(.qspiflash_data)
+		*(.qspiflash_data*)
+		. = ALIGN(4);
+		_eqspiflash_data = .;
+
+		PROVIDE(__qspiflash_data_end = _eqspiflash_data);
+	} > QSPIFLASH
+
+	.qspiflash_bss (NOLOAD) :
+	{
+		. = ALIGN(4);
+		_sqspiflash_bss = .;
+
+		PROVIDE(__qspiflash_bss_start = _sqspiflash_bss);
+		*(.qspiflash_bss)
+		*(.qspiflash_bss*)
+		. = ALIGN(4);
+		_eqspiflash_bss = .;
+
+		PROVIDE(__qspiflash_bss_end = _eqspiflash_bss);
+	} > QSPIFLASH */
+
+	.heap (NOLOAD) :
+	{
+		. = ALIGN(4);
+		PROVIDE(__heap_start__ = .);
+		KEEP(*(.heap))
+		. = ALIGN(4);
+		PROVIDE(__heap_end__ = .);
+	} > SRAM
+
+	PROVIDE(end = .);
+
+	.reserved_for_stack (NOLOAD) :
+	{
+		. = ALIGN(4);
+		PROVIDE(__reserved_for_stack_start__ = .);
+		KEEP(*(.reserved_for_stack))
+		. = ALIGN(4);
+		PROVIDE(__reserved_for_stack_end__ = .);
+	} > DTCMRAM
+
+    DISCARD :
+    {
+        libc.a ( * )
+        libm.a ( * )
+        libgcc.a ( * )
+    }
+
+}