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Added new errors for bus typing and new test files.
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Sacul231 committed Apr 20, 2024
1 parent 499923f commit 6349570
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Showing 5 changed files with 128 additions and 26 deletions.
6 changes: 6 additions & 0 deletions program_structure/src/program_library/error_code.rs
Original file line number Diff line number Diff line change
Expand Up @@ -21,8 +21,10 @@ pub enum ReportCode {
WrongTypesInAssignOperationOperatorSignal,
WrongTypesInAssignOperationOperatorNoSignal,
WrongTypesInAssignOperationTemplate,
WrongTypesInAssignOperationBus,
WrongTypesInAssignOperationExpression,
WrongTypesInAssignOperationArrayTemplates,
WrongTypesInAssignOperationArrayBuses,
WrongTypesInAssignOperationDims(usize, usize),
WrongNumberOfArguments(usize, usize),
UndefinedFunction,
Expand Down Expand Up @@ -69,6 +71,7 @@ pub enum ReportCode {
InvalidTagAccessAfterArray,
InvalidArraySize(usize),
InvalidArraySizeT,
InvalidArraySizeB,
InvalidArrayType,
ForStatementIllConstructed,
BadArrayAccess,
Expand Down Expand Up @@ -122,6 +125,8 @@ impl fmt::Display for ReportCode {
WrongTypesInAssignOperationOperatorNoSignal => "T2000",
WrongTypesInAssignOperationArrayTemplates => "T2000",
WrongTypesInAssignOperationTemplate => "T2000",
WrongTypesInAssignOperationArrayBuses => "T2000",
WrongTypesInAssignOperationBus => "T2000",
WrongTypesInAssignOperationExpression => "T2000",
WrongTypesInAssignOperationDims(..) => "T2000",
UnclosedComment => "P1005",
Expand Down Expand Up @@ -193,6 +198,7 @@ impl fmt::Display for ReportCode {
UnreachableSignals => "T2050",
MainComponentWithTags => "T2051",
UndefinedBus => "T2052",
InvalidArraySizeB => "T2053",
RuntimeError => "T3001",
RuntimeWarning => "T3002",
UnknownDimension => "T20460",
Expand Down
26 changes: 0 additions & 26 deletions tests/bus_dec1.circom

This file was deleted.

17 changes: 17 additions & 0 deletions tests/bus_test_correct_1.circom
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@@ -0,0 +1,17 @@
pragma circom 2.0.0;

bus Point (n) {
signal {binary} x[n], y[n];
}

template Pipe (n) {
Point(n) input {babyedwards} pin;
Point(n) output {babyedwards} pout;

for (var i=0; i<n; i++) {
pout.x[i] <== pin.x[i];
pout.y[i] <== pin.y[i];
}
}

component main = Pipe(3);
82 changes: 82 additions & 0 deletions tests/bus_test_correct_2.circom
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@@ -0,0 +1,82 @@
pragma circom 2.0.0;

include "bitify.circom";
include "escalarmulfix.circom";

bus Point () {
signal x, y;
}

bus Parameters () {
signal beta, gamma, delta, tau;
}

template BabyAdd() {
Point input p1, p2;
Point output pout;

Parameters params;

var a = 168700;
var d = 168696;

params.beta <== p1.x*p2.y;
params.gamma <== p1.y*p2.x;
params.delta <== (-a*p1.x+p1.y)*(p2.x + p2.y);
params.tau <== params.beta * params.gamma;

pout.x <-- (params.beta + params.gamma) / (1+ d*params.tau);
(1 + d*params.tau) * pout.x === (params.beta + params.gamma);

pout.y <-- (params.delta + a*params.beta - params.gamma) / (1-d*params.tau);
(1-d*params.tau)*pout.y === (params.delta + a*params.beta - params.gamma);
}

template BabyDbl() {
Point() input pin;
Point output pout;

component adder = BabyAdd();
adder.p1 <== pin;
adder.p2 <== pin;

adder.pout ==> pout;
}


template BabyCheck() {
Point input p;

Point q;

var a = 168700;
var d = 168696;

q.x <== p.x*p.x;
q.y <== p.y*p.y;

a*q.x + q.y === 1 + d*q.x*q.y;
}

// Extracts the public key from private key
template BabyPbk() {
signal input in;
Point output A;

var BASE8[2] = [
5299619240641551281634865583518297030282874472190772894086521144482721001553,
16950150798460657717958625567821834550301663161624707787222815936182638968203
];

component pvkBits = Num2Bits(253);
pvkBits.in <== in;

component mulFix = EscalarMulFix(253, BASE8);

var i;
for (i=0; i<253; i++) {
mulFix.e[i] <== pvkBits.out[i];
}
A.x <== mulFix.out[0];
A.y <== mulFix.out[1];
}
23 changes: 23 additions & 0 deletions tests/bus_test_correct_3.circom
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@@ -0,0 +1,23 @@
pragma circom 2.0.0;

bus Correct {
signal {binary} correct;
}

bus RecursiveArray (N) {
Correct array[N];
RecursiveArray(N-1) rec;
}

template Create (N) {
RecursiveArray(N) output out;

component create_rec = Create(N-1);

for (var i=0; i<n; i++) {
out.array[i].correct <== 1;
}
out.rec <== create_rec.out;
}

component main = Create(2);

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