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Although we had thought before that the chip can only access two RAM chips for graphics, and the third one is used by the CPU only, that is not the case.
X-Men (GX065 board) uses three RAM chips. RAM2 is used for the tile code. Both RAM0 and RAM1 get output through the COL pins at different points in time. One of them is latched to be used as ROM address top 8 bits. The other becomes the real color value, going into 051962.
The VDE pin is used to latch COL for ROM bank use. So we finally see that pin in action.
The full schematics are here but note that I am still reviewing them and may have small changes during the next couple of weeks.
The text was updated successfully, but these errors were encountered:
Although we had thought before that the chip can only access two RAM chips for graphics, and the third one is used by the CPU only, that is not the case.
X-Men (GX065 board) uses three RAM chips. RAM2 is used for the tile code. Both RAM0 and RAM1 get output through the COL pins at different points in time. One of them is latched to be used as ROM address top 8 bits. The other becomes the real color value, going into 051962.
The VDE pin is used to latch COL for ROM bank use. So we finally see that pin in action.
The full schematics are here but note that I am still reviewing them and may have small changes during the next couple of weeks.
The text was updated successfully, but these errors were encountered: