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arm: at91: reworked meesc board support
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Signed-off-by: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
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Daniel Gorsulowski authored and Andreas Bießmann committed Nov 3, 2015
1 parent a3b59b1 commit 83bf005
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Showing 2 changed files with 36 additions and 26 deletions.
20 changes: 16 additions & 4 deletions board/esd/meesc/meesc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
* Stelian Pop <stelian@popies.net>
* Lead Tech Design <www.leadtechdesign.com>
*
* (C) Copyright 2009-2011
* (C) Copyright 2009-2015
* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
* esd electronic system design gmbh <www.esd.eu>
*
Expand All @@ -28,6 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
* Miscelaneous platform dependent initialisations
*/

#ifdef CONFIG_REVISION_TAG
static int hw_rev = -1; /* hardware revision */

int get_hw_rev(void)
Expand All @@ -45,6 +46,7 @@ int get_hw_rev(void)

return hw_rev;
}
#endif /* CONFIG_REVISION_TAG */

#ifdef CONFIG_CMD_NAND
static void meesc_nand_hw_init(void)
Expand Down Expand Up @@ -125,12 +127,18 @@ static void meesc_ethercat_hw_init(void)

int dram_init(void)
{
gd->ram_size = get_ram_size(
(void *)CONFIG_SYS_SDRAM_BASE,
CONFIG_SYS_SDRAM_SIZE);
/* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
PHYS_SDRAM_SIZE);
return 0;
}

void dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
}

int board_eth_init(bd_t *bis)
{
int rc = 0;
Expand All @@ -140,6 +148,7 @@ int board_eth_init(bd_t *bis)
return rc;
}

#ifdef CONFIG_DISPLAY_BOARDINFO
int checkboard(void)
{
char str[32];
Expand Down Expand Up @@ -173,10 +182,13 @@ int checkboard(void)
puts(", serial# ");
puts(str);
}
#ifdef CONFIG_REVISION_TAG
printf("\nHardware-revision: 1.%d\n", get_hw_rev());
#endif
printf("Mach-type: %lu\n", gd->bd->bi_arch_number);
return 0;
}
#endif /* CONFIG_DISPLAY_BOARDINFO */

#ifdef CONFIG_SERIAL_TAG
void get_board_serial(struct tag_serialnr *serialnr)
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42 changes: 20 additions & 22 deletions include/configs/meesc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
* Stelian Pop <stelian@popies.net>
* Lead Tech Design <www.leadtechdesign.com>
*
* (C) Copyright 2009-2011
* (C) Copyright 2009-2015
* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
* esd electronic system design gmbh <www.esd.eu>
*
Expand All @@ -27,7 +27,7 @@
* Since the linker has to swallow that define, we must use a pure
* hex number here!
*/
#define CONFIG_SYS_TEXT_BASE 0x20002000
#define CONFIG_SYS_TEXT_BASE 0x21F00000

/*
* since a number of boards are not being listed in linux
Expand Down Expand Up @@ -56,14 +56,13 @@
#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
#define CONFIG_PREBOOT /* enable preboot variable */

#define CONFIG_CMD_BOOTZ
#define CONFIG_OF_LIBFDT

/*
* Hardware drivers
*/

/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP

/* general purpose I/O */
#define CONFIG_AT91_GPIO

Expand All @@ -87,10 +86,17 @@
/*
* Command line configuration.
*/
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_IMLS

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP

#ifdef CONFIG_SYS_USE_NANDFLASH
#define CONFIG_CMD_NAND
#define CONFIG_CMD_USB
#endif

/* LED */
#define CONFIG_AT91_LED
Expand All @@ -99,9 +105,12 @@
* SDRAM: 1 bank, min 32, max 128 MB
* Initialized before u-boot gets started.
*/
#define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */
#define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */

#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
#define CONFIG_SYS_SDRAM_SIZE 0x02000000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE

#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
Expand Down Expand Up @@ -133,7 +142,7 @@
#ifdef CONFIG_CMD_NAND
# define CONFIG_NAND_ATMEL
# define CONFIG_SYS_MAX_NAND_DEVICE 1
# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
# define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */
# define CONFIG_SYS_NAND_DBW_8
# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Expand All @@ -148,19 +157,6 @@
#define CONFIG_NET_RETRY_COUNT 20
#undef CONFIG_RESET_PHY_R

/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2

/* CAN */
#define CONFIG_AT91_CAN

/* hw-controller addresses */
#define CONFIG_ET1100_BASE 0x70000000

Expand Down Expand Up @@ -190,6 +186,8 @@
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER

/*
* Size of malloc() pool
Expand Down

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