Merge pull request #545 from MDr164/stm32-u5-usbrefclk-enum

Add USBREFCLK enum for OTG HS PHY
embassy-rs · Dec 6, 2024 · ddb0e7a · ddb0e7a
2 parents 25b1b74 + b05f147
commit ddb0e7a
Showing 1 changed file with 22 additions and 0 deletions.
diff --git a/data/registers/syscfg_u5.yaml b/data/registers/syscfg_u5.yaml
@@ -261,6 +261,7 @@ fieldset/OTGHSPHYCR:
     description: Reference clock frequency selection
     bit_offset: 2
     bit_size: 4
+    enum: USBREFCKSEL
 fieldset/OTGHSPHYTUNER2:
   description: OTG_HS tune register 2
   fields:
@@ -276,3 +277,24 @@ fieldset/OTGHSPHYTUNER2:
     description: HS transmitter preemphasis current control
     bit_offset: 13
     bit_size: 2
+enum/USBREFCKSEL:
+  bit_size: 4
+  variants:
+  - name: Mhz16
+    description: The kernel clock frequency provided to the OTG_HS PHY is 16 MHz.
+    value: 3
+  - name: Mhz19_2
+    description: The kernel clock frequency provided to the OTG_HS PHY is 19.2 MHz.
+    value: 8
+  - name: Mhz20
+    description: The kernel clock frequency provided to the OTG_HS PHY is 20MHz.
+    value: 9
+  - name: Mhz24
+    description: The kernel clock frequency provided to the OTG_HS PHY is 24 MHz (default after reset).
+    value: 10
+  - name: Mhz32
+    description: The kernel clock frequency provided to the OTG_HS PHY is 32 MHz.
+    value: 11
+  - name: Mhz26
+    description: The kernel clock frequency provided to the OTG_HS PHY is 26 MHz.
+    value: 14