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use private_bounds for sealed traits.
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Dirbaio committed Mar 23, 2024
1 parent cb1e4e6 commit 4aa4ea9
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Showing 5 changed files with 49 additions and 64 deletions.
8 changes: 3 additions & 5 deletions embassy-hal-internal/src/interrupt.rs
Original file line number Diff line number Diff line change
Expand Up @@ -30,14 +30,12 @@ macro_rules! interrupt_mod {
pub mod typelevel {
use super::InterruptExt;

mod sealed {
pub trait Interrupt {}
}
trait SealedInterrupt {}

/// Type-level interrupt.
///
/// This trait is implemented for all typelevel interrupt types in this module.
pub trait Interrupt: sealed::Interrupt {
pub trait Interrupt: SealedInterrupt {

/// Interrupt enum variant.
///
Expand Down Expand Up @@ -105,7 +103,7 @@ macro_rules! interrupt_mod {
#[doc=stringify!($irqs)]
#[doc=" typelevel interrupt."]
pub enum $irqs {}
impl sealed::Interrupt for $irqs{}
impl SealedInterrupt for $irqs{}
impl Interrupt for $irqs {
const IRQ: super::Interrupt = super::Interrupt::$irqs;
}
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73 changes: 32 additions & 41 deletions embassy-net-wiznet/src/chip/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,49 +2,40 @@
mod w5500;
pub use w5500::W5500;
mod w5100s;
use embedded_hal_async::spi::SpiDevice;
pub use w5100s::W5100S;

pub(crate) mod sealed {
use embedded_hal_async::spi::SpiDevice;

pub trait Chip {
type Address;

const COMMON_MODE: Self::Address;
const COMMON_MAC: Self::Address;
const COMMON_SOCKET_INTR: Self::Address;
const COMMON_PHY_CFG: Self::Address;
const SOCKET_MODE: Self::Address;
const SOCKET_COMMAND: Self::Address;
const SOCKET_RXBUF_SIZE: Self::Address;
const SOCKET_TXBUF_SIZE: Self::Address;
const SOCKET_TX_FREE_SIZE: Self::Address;
const SOCKET_TX_DATA_WRITE_PTR: Self::Address;
const SOCKET_RECVD_SIZE: Self::Address;
const SOCKET_RX_DATA_READ_PTR: Self::Address;
const SOCKET_INTR_MASK: Self::Address;
const SOCKET_INTR: Self::Address;

const SOCKET_MODE_VALUE: u8;

const BUF_SIZE: u16;
const AUTO_WRAP: bool;

fn rx_addr(addr: u16) -> Self::Address;
fn tx_addr(addr: u16) -> Self::Address;

async fn bus_read<SPI: SpiDevice>(
spi: &mut SPI,
address: Self::Address,
data: &mut [u8],
) -> Result<(), SPI::Error>;
async fn bus_write<SPI: SpiDevice>(
spi: &mut SPI,
address: Self::Address,
data: &[u8],
) -> Result<(), SPI::Error>;
}
pub(crate) trait SealedChip {
type Address;

const COMMON_MODE: Self::Address;
const COMMON_MAC: Self::Address;
const COMMON_SOCKET_INTR: Self::Address;
const COMMON_PHY_CFG: Self::Address;
const SOCKET_MODE: Self::Address;
const SOCKET_COMMAND: Self::Address;
const SOCKET_RXBUF_SIZE: Self::Address;
const SOCKET_TXBUF_SIZE: Self::Address;
const SOCKET_TX_FREE_SIZE: Self::Address;
const SOCKET_TX_DATA_WRITE_PTR: Self::Address;
const SOCKET_RECVD_SIZE: Self::Address;
const SOCKET_RX_DATA_READ_PTR: Self::Address;
const SOCKET_INTR_MASK: Self::Address;
const SOCKET_INTR: Self::Address;

const SOCKET_MODE_VALUE: u8;

const BUF_SIZE: u16;
const AUTO_WRAP: bool;

fn rx_addr(addr: u16) -> Self::Address;
fn tx_addr(addr: u16) -> Self::Address;

async fn bus_read<SPI: SpiDevice>(spi: &mut SPI, address: Self::Address, data: &mut [u8])
-> Result<(), SPI::Error>;
async fn bus_write<SPI: SpiDevice>(spi: &mut SPI, address: Self::Address, data: &[u8]) -> Result<(), SPI::Error>;
}

/// Trait for Wiznet chips.
pub trait Chip: sealed::Chip {}
#[allow(private_bounds)]
pub trait Chip: SealedChip {}
2 changes: 1 addition & 1 deletion embassy-net-wiznet/src/chip/w5100s.rs
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ const RX_BASE: u16 = 0x6000;
pub enum W5100S {}

impl super::Chip for W5100S {}
impl super::sealed::Chip for W5100S {
impl super::SealedChip for W5100S {
type Address = u16;

const COMMON_MODE: Self::Address = 0x00;
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2 changes: 1 addition & 1 deletion embassy-net-wiznet/src/chip/w5500.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ pub enum RegisterBlock {
pub enum W5500 {}

impl super::Chip for W5500 {}
impl super::sealed::Chip for W5500 {
impl super::SealedChip for W5500 {
type Address = (RegisterBlock, u16);

const COMMON_MODE: Self::Address = (RegisterBlock::Common, 0x00);
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28 changes: 12 additions & 16 deletions embassy-usb/src/msos.rs
Original file line number Diff line number Diff line change
Expand Up @@ -226,27 +226,21 @@ pub mod windows_version {
pub const WIN10: u32 = 0x0A000000;
}

mod sealed {
use core::mem::size_of;
/// A trait for descriptors
trait Descriptor: Sized {
const TYPE: DescriptorType;

/// A trait for descriptors
pub trait Descriptor: Sized {
const TYPE: super::DescriptorType;

/// The size of the descriptor's header.
fn size(&self) -> usize {
size_of::<Self>()
}

fn write_to(&self, buf: &mut [u8]);
/// The size of the descriptor's header.
fn size(&self) -> usize {
size_of::<Self>()
}

pub trait DescriptorSet: Descriptor {
const LENGTH_OFFSET: usize;
}
fn write_to(&self, buf: &mut [u8]);
}

use sealed::*;
trait DescriptorSet: Descriptor {
const LENGTH_OFFSET: usize;
}

/// Copies the data of `t` into `buf`.
///
Expand Down Expand Up @@ -412,9 +406,11 @@ impl DescriptorSet for FunctionSubsetHeader {
// Feature Descriptors

/// A marker trait for feature descriptors that are valid at the device level.
#[allow(private_bounds)]
pub trait DeviceLevelDescriptor: Descriptor {}

/// A marker trait for feature descriptors that are valid at the function level.
#[allow(private_bounds)]
pub trait FunctionLevelDescriptor: Descriptor {}

/// Table 13. Microsoft OS 2.0 compatible ID descriptor.
Expand Down

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