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Piezo, PIFOTree: static option! #1783

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merged 17 commits into from
Nov 20, 2023
Merged

Piezo, PIFOTree: static option! #1783

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7c9c3ac
Attempt at static incr groups
anshumanmohan Nov 19, 2023
b4e98fe
Better generation of static incr
anshumanmohan Nov 19, 2023
aa73c89
Cleaner incr generation
anshumanmohan Nov 19, 2023
61655ed
Static par
anshumanmohan Nov 19, 2023
9221a53
Better generation of static incr
anshumanmohan Nov 19, 2023
7c3d46e
Support for non-static choice
anshumanmohan Nov 19, 2023
019625e
Close?
anshumanmohan Nov 19, 2023
9d89587
Pushing the generated file that's causing the error
anshumanmohan Nov 19, 2023
4fb471b
Merge branch 'master' into static-pifotree.py
anshumanmohan Nov 19, 2023
9ff43e9
No more static as cmd line flag
anshumanmohan Nov 20, 2023
a951943
Some renaming
anshumanmohan Nov 20, 2023
016c00f
More renaming
anshumanmohan Nov 20, 2023
6eb91bb
Add static to runt
anshumanmohan Nov 20, 2023
7198553
Remove yx file
anshumanmohan Nov 20, 2023
7be44bf
Neater incr
anshumanmohan Nov 20, 2023
27ada34
Tidying in SDN code
anshumanmohan Nov 20, 2023
3e36475
Nit
anshumanmohan Nov 20, 2023
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Neater incr
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@anshumanmohan
anshumanmohan committed Nov 20, 2023
commit 7be44bfc3e87a34da293ce83d1f3ff6bb7d381fd
24 changes: 9 additions & 15 deletions calyx-py/calyx/builder.py
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Original file line number Diff line number Diff line change
Expand Up @@ -523,29 +523,23 @@ def bitwise_flip_reg(self, reg, cellname=None):
not_group.done = reg.done
return not_group

def incr(self, reg, val=1, signed=False, cellname=None):
def incr(self, reg, val=1, signed=False, cellname=None, static=False):
"""Inserts wiring into `self` to perform `reg := reg + val`."""
cellname = cellname or f"{reg.name}_incr"
width = reg.infer_width_reg()
add_cell = self.add(width, cellname, signed)
with self.group(f"{cellname}_group") as incr_group:
add_cell.left = reg.out
add_cell.right = const(width, val)
reg.write_en = 1
reg.in_ = add_cell.out
incr_group.done = reg.done
return incr_group

def incr_static(self, reg, val=1, signed=False, cellname=None):
"""Inserts wiring into `self` to perform `reg := reg + val` statically."""
cellname = cellname or f"{reg.name}_incr"
width = reg.infer_width_reg()
add_cell = self.add(width, cellname, signed)
with self.static_group(f"{cellname}_group", 1) as incr_group:
group = (
self.static_group(f"{cellname}_group", 1)
if static
else self.group(f"{cellname}_group")
)
with group as incr_group:
add_cell.left = reg.out
add_cell.right = const(width, val)
reg.write_en = 1
reg.in_ = add_cell.out
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@anshumanmohan anshumanmohan Nov 19, 2023 •
edited
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It would have been nice to have reused the existing incr with a static flag as an argument. I got a good way through it, but then the issue is that the dynamic version needs a line incr_group.done = ... but the static version does not.

I'd usually do that with the Python idiom of X if b else Y, but that doesn't tango super well with the eDSL's own with foo as bar: baz idiom.

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@anshumanmohan anshumanmohan Nov 19, 2023 •
edited
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Just paging @sampsyo in case he knows a neat way! Like basically is there some Y such that I could do:

with foo as bar:
  ...
  ...
  X if not static else Y

and the Y would be a no-op, ignored when generating Calyx code?

If I had a nice way of doing this, I could go through and do it for lots of helpers in the eDSL!

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Thank you for the sync chat; it worked like a charm!

if not static:
incr_group.done = reg.done
return incr_group

def decr(self, reg, val=1, signed=False, cellname=None):
Expand Down
4 changes: 2 additions & 2 deletions calyx-py/test/correctness/sdn.py
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Expand Up @@ -37,8 +37,8 @@ def insert_stats(prog, name, static=False):

# Wiring to increment the appropriate register.
if static:
count_0_incr = stats.incr_static(count_0_sto)
count_1_incr = stats.incr_static(count_1_sto)
count_0_incr = stats.incr(count_0_sto, static=static)
count_1_incr = stats.incr(count_1_sto, static=static)
else:
count_0_incr = stats.incr(count_0_sto)
count_1_incr = stats.incr(count_1_sto)
Expand Down