fix variant WeActMiniH7xx: ena peripheral pll clks

in previous commmit some clocks from PLL2, PLL3 are not distributed to some peripherals stm32duino#1552 originally to save some power. However, users using those pheriperials may mistake that it is not working this fix distributes the missed out PLL clocks to all pheripherals those clocks are at 80 Mhz
ag88 · Dec 11, 2021 · 803d0b3 · 803d0b3
1 parent d2a867e
commit 803d0b3
Showing 1 changed file with 6 additions and 12 deletions.
diff --git a/...s/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH7xx.cpp b/...s/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH7xx.cpp
@@ -235,29 +235,23 @@ WEAK void SystemClock_Config(void)
   // QSPI from PLL1 qclk
   PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_PLL;
   // SDMMC from PLL1 qclk
-  PeriphClkInitStruct.SdmmcClockSelection = 0;
-  //PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
+  PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
   // LPUART from PLL2 qclk
-  PeriphClkInitStruct.Lpuart1ClockSelection = 0;
-  //PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2;
+  PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2;
   // USART from PLL2 qclk
   PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_PLL2;
   // USART from PLL2 qclk
-  PeriphClkInitStruct.Usart234578ClockSelection = 0;
-  //PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
+  PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
   // I2C123 from PLL3 rclk
   PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_PLL3;
   // I2C4 from PLL3 rclk
-  PeriphClkInitStruct.I2c4ClockSelection = 0;
-  //PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3;
+  PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3;
   // SPI123 from PLL2 pclk
   PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
   // SPI45 from PLL2 qclk
-  PeriphClkInitStruct.Spi45ClockSelection = 0;
-  //PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL2;
+  PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL2;
   // SPI6 from PLL2 qclk
-  PeriphClkInitStruct.Spi6ClockSelection = 0;
-  //PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2;
+  PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2;
 
 
   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {