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Revert "[AsmParser] Remove typed pointer auto-detection"
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This reverts commit 9ed2f14.
@KornevNikita
KornevNikita committed Jan 30, 2023
1 parent ff3c96b commit 776d725
Showing 384 changed files with 582 additions and 556 deletions.
7 changes: 4 additions & 3 deletions llvm/docs/OpaquePointers.rst
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@@ -277,7 +277,7 @@ supported.
Transition State
================

As of January 2023:
As of December 2022:

Tests are in the process of being converted to opaque pointers. All new tests
must use opaque pointers.
@@ -294,11 +294,12 @@ The following typed pointer functionality has already been removed:
* The ``CLANG_ENABLE_OPAQUE_POINTERS`` cmake flag is no longer supported.
* C APIs that do not support opaque pointers (like ``LLVMBuildLoad``) are no
longer supported.
* Typed pointer IR and bitcode is implicitly upgraded to use opaque pointers,
unless ``-opaque-pointers=0`` is passed.
* Typed pointer bitcode is implicitly upgraded to use opaque pointers, unless
``-opaque-pointers=0`` is passed.

The following typed pointer functionality is still to be removed:

* The ``-no-opaque-pointers`` cc1 flag, ``-opaque-pointers=0`` opt flag and
``-plugin-opt=no-opaque-pointers`` lto flag.
* Auto-detection of typed pointers in textual IR.
* Support for typed pointers in LLVM libraries.
5 changes: 4 additions & 1 deletion llvm/lib/AsmParser/LLLexer.cpp
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@@ -807,7 +807,10 @@ lltok::Kind LLLexer::LexIdentifier() {
TYPEKEYWORD("token", Type::getTokenTy(Context));

if (Keyword == "ptr") {
if (Context.supportsTypedPointers()) {
// setOpaquePointers() must be called before creating any pointer types.
if (!Context.hasSetOpaquePointersValue()) {
Context.setOpaquePointers(true);
} else if (Context.supportsTypedPointers()) {
Warning("ptr type is only supported in -opaque-pointers mode");
return lltok::Error;
}
22 changes: 22 additions & 0 deletions llvm/lib/AsmParser/LLParser.cpp
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@@ -61,9 +61,31 @@ static std::string getTypeString(Type *T) {
return Tmp.str();
}

static void setContextOpaquePointers(LLLexer &L, LLVMContext &C) {
while (true) {
lltok::Kind K = L.Lex();
// LLLexer will set the opaque pointers option in LLVMContext if it sees an
// explicit "ptr".
if (K == lltok::star || K == lltok::Error || K == lltok::Eof ||
isa_and_nonnull<PointerType>(L.getTyVal())) {
if (K == lltok::star)
C.setOpaquePointers(false);
return;
}
}
}

/// Run: module ::= toplevelentity*
bool LLParser::Run(bool UpgradeDebugInfo,
DataLayoutCallbackTy DataLayoutCallback) {
// If we haven't decided on whether or not we're using opaque pointers, do a
// quick lex over the tokens to see if we explicitly construct any typed or
// opaque pointer types.
// Don't bail out on an error so we do the same work in the parsing below
// regardless of if --opaque-pointers is set.
if (!Context.hasSetOpaquePointersValue())
setContextOpaquePointers(OPLex, Context);

// Prime the lexer.
Lex.Lex();

4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AMDGPU/lower-kernel-and-module-lds.ll
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@@ -1,5 +1,5 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s

@lds.size.1.align.1 = internal unnamed_addr addrspace(3) global [1 x i8] undef, align 1
@lds.size.2.align.2 = internal unnamed_addr addrspace(3) global [2 x i8] undef, align 2
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/AMDGPU/lower-kernel-lds-super-align.ll
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@@ -1,7 +1,7 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=true --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_ON %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=true --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_ON %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=false --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_OFF %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=false --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_OFF %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=true --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_ON %s
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=true --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_ON %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=false --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_OFF %s
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=false --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_OFF %s

; CHECK: %llvm.amdgcn.kernel.k1.lds.t = type { [32 x i8] }
; CHECK: %llvm.amdgcn.kernel.k2.lds.t = type { i16, [2 x i8], i16 }
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AMDGPU/lower-kernel-lds.ll
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@@ -1,5 +1,5 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s

@lds.size.1.align.1 = internal unnamed_addr addrspace(3) global [1 x i8] undef, align 1
@lds.size.2.align.2 = internal unnamed_addr addrspace(3) global [2 x i8] undef, align 2
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
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@@ -1,6 +1,6 @@
; RUN: llc -opaque-pointers=0 -march=amdgcn -mcpu=gfx900 -O3 --amdgpu-lower-module-lds-strategy=module < %s | FileCheck -check-prefix=GCN %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: llc -march=amdgcn -mcpu=gfx900 -O3 --amdgpu-lower-module-lds-strategy=module < %s | FileCheck -check-prefix=GCN %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s

%vec_type = type { %vec_base }
%vec_base = type { %union.anon }
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
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@@ -1,5 +1,5 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s

@a = internal unnamed_addr addrspace(3) global [64 x i32] undef, align 4
@b = internal unnamed_addr addrspace(3) global [64 x i32] undef, align 4
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
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@@ -1,6 +1,6 @@
; RUN: llc -opaque-pointers=0 -march=amdgcn -mcpu=gfx900 -O3 < %s | FileCheck -check-prefix=GCN %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-lower-module-lds < %s | FileCheck %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds < %s | FileCheck %s
; RUN: llc -march=amdgcn -mcpu=gfx900 -O3 < %s | FileCheck -check-prefix=GCN %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds < %s | FileCheck %s

@a = internal unnamed_addr addrspace(3) global [64 x i32] undef, align 4
@b = internal unnamed_addr addrspace(3) global [64 x i32] undef, align 4
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AMDGPU/lower-module-lds-constantexpr.ll
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@@ -1,5 +1,5 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s

; CHECK: %llvm.amdgcn.module.lds.t = type { float, float }
; CHECK: %llvm.amdgcn.kernel.timestwo.lds.t = type { float, float }
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
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@@ -1,7 +1,7 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn--amdhsa -passes=amdgpu-lower-module-lds < %s --amdgpu-lower-module-lds-strategy=table | FileCheck -check-prefix=OPT %s
; RUN: llc -opaque-pointers=0 -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s --amdgpu-lower-module-lds-strategy=table | FileCheck -check-prefix=GCN %s
; RUN: opt -S -mtriple=amdgcn--amdhsa -passes=amdgpu-lower-module-lds < %s --amdgpu-lower-module-lds-strategy=table | FileCheck -check-prefix=OPT %s
; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s --amdgpu-lower-module-lds-strategy=table | FileCheck -check-prefix=GCN %s

; Opt checks from utils/update_test_checks.py, llc -opaque-pointers=0 checks from utils/update_llc_test_checks.py, both modified.
; Opt checks from utils/update_test_checks.py, llc checks from utils/update_llc_test_checks.py, both modified.

; Define four variables and four non-kernel functions which access exactly one variable each
@v0 = addrspace(3) global float undef
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AMDGPU/lower-module-lds.ll
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@@ -1,5 +1,5 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s

; Padding to meet alignment, so references to @var1 replaced with gep ptr, 0, 2
; No i64 as addrspace(3) types with initializers are ignored. Likewise no addrspace(4).
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/replace-lds-by-ptr-call-diamond-shape.ll
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@@ -1,4 +1,4 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s

; DESCRIPTION:
;
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/replace-lds-by-ptr-call-selected_functions.ll
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@@ -1,4 +1,4 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s

; DESCRIPTION:
;
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/replace-lds-by-ptr-indirect-call-diamond-shape.ll
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@@ -1,4 +1,4 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s

; DESCRIPTION:
;
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/replace-lds-by-ptr-indirect-call-selected_functions.ll
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@@ -1,4 +1,4 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s

; DESCRIPTION:
;
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/replace-lds-by-ptr-indirect-call-signature-match.ll
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@@ -1,4 +1,4 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s

; DESCRIPTION:
;
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/replace-lds-by-ptr-use-multiple-lds.ll
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@@ -1,4 +1,4 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s

; DESCRIPTION:
;
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/replace-lds-by-ptr-use-same-lds.ll
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@@ -1,4 +1,4 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s

; DESCRIPTION:
;
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/replace-lds-by-ptr-use-within-phi-inst.ll
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@@ -1,4 +1,4 @@
; RUN: opt -opaque-pointers=0 -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s

; DESCRIPTION:
;
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/combine-movc-sub.ll
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -opaque-pointers=0 %s -o - -verify-machineinstrs | FileCheck %s
; RUN: llc %s -o - -verify-machineinstrs | FileCheck %s

target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
target triple = "thumbv7s-apple-unknown"
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/fast-isel-inline-asm.ll
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@@ -1,4 +1,4 @@
; RUN: llc -opaque-pointers=0 -fast-isel < %s | FileCheck %s
; RUN: llc -fast-isel < %s | FileCheck %s
target datalayout = "e-m:o-p:32:32-i1:8:32-i8:8:32-i16:16:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
target triple = "thumbv7-apple-ios5.0.0"

2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/inlineasm-X-constraint.ll
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@@ -1,4 +1,4 @@
; RUN: llc -opaque-pointers=0 -mtriple=armv7-none-eabi -mattr=+neon < %s -o - | FileCheck %s
; RUN: llc -mtriple=armv7-none-eabi -mattr=+neon < %s -o - | FileCheck %s

; The following functions test the use case where an X constraint is used to
; add a dependency between an assembly instruction (vmsr in this case) and
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/lsr-setupcost.ll
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -opaque-pointers=0 -mtriple=thumbv6m-none-eabi -loop-reduce %s -S -o - | FileCheck %s
; RUN: opt -mtriple=thumbv6m-none-eabi -loop-reduce %s -S -o - | FileCheck %s

target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"

6 changes: 3 additions & 3 deletions llvm/test/CodeGen/ARM/shifter_operand.ll
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@@ -1,6 +1,6 @@
; RUN: llc -opaque-pointers=0 < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-ARM
; RUN: llc -opaque-pointers=0 < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a9 | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-ARM
; RUN: llc -opaque-pointers=0 < %s -mtriple=thumbv7m-none-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMB
; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-ARM
; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a9 | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-ARM
; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMB
; rdar://8576755


2 changes: 1 addition & 1 deletion llvm/test/CodeGen/Hexagon/addrmode.ll
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@@ -1,4 +1,4 @@
; RUN: llc -opaque-pointers=0 -O3 -march=hexagon < %s | FileCheck %s
; RUN: llc -O3 -march=hexagon < %s | FileCheck %s

; CHECK-NOT: memb(r{{[0-9]+}}+#375) = #4
; CHECK: [[REG0:(r[0-9]+)]] = add(r{{[0-9]+}},{{#?}}#374)
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/Hexagon/autohvx/vector-align-tbaa.ll
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -opaque-pointers=0 -mtriple=hexagon -S -hexagon-vc -instcombine < %s | FileCheck %s
; RUN: opt -mtriple=hexagon -S -hexagon-vc -instcombine < %s | FileCheck %s

; Check that Hexagon Vector Combine propagates (TBAA) metadata to the
; generated output. (Use instcombine to clean the output up a bit.)
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/Hexagon/common-gep-inbounds.ll
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@@ -1,4 +1,4 @@
; RUN: llc -opaque-pointers=0 -march=hexagon -debug-only=commgep 2>&1 < %s | FileCheck %s
; RUN: llc -march=hexagon -debug-only=commgep 2>&1 < %s | FileCheck %s
; REQUIRES: asserts

; We should generate new GEPs with "inbounds" flag.
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/Hexagon/swp-epilog-phi7.ll
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@@ -1,4 +1,4 @@
; RUN: llc -opaque-pointers=0 -march=hexagon -O2 -enable-pipeliner -disable-block-placement=0 < %s | FileCheck %s
; RUN: llc -march=hexagon -O2 -enable-pipeliner -disable-block-placement=0 < %s | FileCheck %s

; For the Phis generated in the epilog, test that we generate the correct
; names for the values coming from the prolog stages. The test belows
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
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@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -opaque-pointers=0 -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=ASM32 %s
; RUN: llc -opaque-pointers=0 -O2 -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | FileCheck --check-prefix=32BIT %s
; RUN: llc -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=ASM32 %s
; RUN: llc -O2 -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | FileCheck --check-prefix=32BIT %s

define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr {
; ASM32-LABEL: int_va_arg:
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee-split.ll
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -opaque-pointers=0 -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
; RUN: -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff < %s | \
; RUN: FileCheck %s

2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee.ll
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -opaque-pointers=0 -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
; RUN: -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff < %s | \
; RUN: FileCheck %s

2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/aix32-vector-vararg-fixed-callee.ll
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -opaque-pointers=0 -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
; RUN: -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff < %s | \
; RUN: FileCheck %s

4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
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@@ -1,7 +1,7 @@
; RUN: llc -opaque-pointers=0 -O2 -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
; RUN: llc -O2 -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
; RUN: FileCheck --check-prefix=64BIT %s

; RUN: llc -opaque-pointers=0 -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
; RUN: llc -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | \
; RUN: FileCheck --check-prefix=ASM64 %s

2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/aix64-vector-vararg-callee.ll
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -opaque-pointers=0 -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
; RUN: -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff < %s | \
; RUN: FileCheck %s

2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -opaque-pointers=0 -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
; RUN: -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff < %s | \
; RUN: FileCheck %s

2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/common-chain.ll
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -opaque-pointers=0 -ppc-asm-full-reg-names -verify-machineinstrs -ppc-formprep-chain-commoning \
; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs -ppc-formprep-chain-commoning \
; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck %s

; addresses:
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