Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.
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Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.
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YiminGao0113/ArtyS7-RPU-SoC
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Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.
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- VHDL 81.7%
- Coq 14.7%
- Verilog 2.5%
- SystemVerilog 0.9%
- Tcl 0.1%
- C 0.1%