cpusupport: ARM-SHA256 run-time detection

Tarsnap · Feb 20, 2021 · 02f20fe · 02f20fe
1 parent 9757296
commit 02f20fe
Show file tree

Hide file tree

Showing 2 changed files with 39 additions and 0 deletions.
diff --git a/libcperciva/cpusupport/cpusupport.h b/libcperciva/cpusupport/cpusupport.h
@@ -109,5 +109,6 @@ CPUSUPPORT_FEATURE(x86, shani, X86_SHANI);
 CPUSUPPORT_FEATURE(x86, sse2, X86_SSE2);
 CPUSUPPORT_FEATURE(x86, ssse3, X86_SSSE3);
 CPUSUPPORT_FEATURE(arm, crc32_64, ARM_CRC32_64);
+CPUSUPPORT_FEATURE(arm, sha256, ARM_SHA256);
 
 #endif /* !_CPUSUPPORT_H_ */
diff --git a/libcperciva/cpusupport/cpusupport_arm_sha256.c b/libcperciva/cpusupport/cpusupport_arm_sha256.c
@@ -0,0 +1,38 @@
+#include "cpusupport.h"
+
+#ifdef CPUSUPPORT_HWCAP_GETAUXVAL
+#include <sys/auxv.h>
+
+#if defined(__arm__)
+/**
+ * Workaround for a glibc bug: <bits/hwcap.h> contains a comment saying:
+ *     The following must match the kernel's <asm/hwcap.h>.
+ * However, it does not contain any of the HWCAP2_* entries from <asm/hwcap.h>.
+ */
+#ifndef HWCAP2_CRC32
+#include <asm/hwcap.h>
+#endif
+#endif /* __arm__ */
+#endif /* CPUSUPPORT_HWCAP_GETAUXVAL */
+
+CPUSUPPORT_FEATURE_DECL(arm, sha256)
+{
+	int supported = 0;
+
+#if defined(CPUSUPPORT_ARM_SHA256)
+#if defined(CPUSUPPORT_HWCAP_GETAUXVAL)
+	unsigned long capabilities;
+
+#if defined(__aarch64__)
+	capabilities = getauxval(AT_HWCAP);
+	supported = (capabilities & HWCAP_SHA2) ? 1 : 0;
+#elif defined(__arm__)
+	capabilities = getauxval(AT_HWCAP2);
+	supported = (capabilities & HWCAP2_SHA2) ? 1 : 0;
+#endif
+#endif /* CPUSUPPORT_HWCAP_GETAUXVAL */
+#endif /* CPUSUPPORT_ARM_SHA256 */
+
+	/* Return the supported status. */
+	return (supported);
+}