From 4218fca6734692f0b14337f5bba4bff13e04a33f Mon Sep 17 00:00:00 2001 From: Joshua DeWeese Date: Fri, 19 May 2023 13:10:51 -0400 Subject: [PATCH 1/3] cpu/{gd32v,stm32}/periph/adc: make ADC clock setable This patch allows boards to select a max ADC clock speed. This could be handy if the board wants to clock the ADC differently according to the board's front end analog circuitry or MCU model's ADC capabilities. --- cpu/gd32v/periph/adc.c | 6 ++++-- cpu/stm32/periph/adc_f1.c | 6 ++++-- cpu/stm32/periph/adc_f2.c | 6 ++++-- cpu/stm32/periph/adc_f4_f7.c | 6 ++++-- 4 files changed, 16 insertions(+), 8 deletions(-) diff --git a/cpu/gd32v/periph/adc.c b/cpu/gd32v/periph/adc.c index 4dfdc98a5c41..a1868bf72fa9 100644 --- a/cpu/gd32v/periph/adc.c +++ b/cpu/gd32v/periph/adc.c @@ -31,7 +31,9 @@ /** * @brief Maximum allowed ADC clock speed */ -#define MAX_ADC_SPEED MHZ(14) +#ifndef ADC_CLK_MAX +#define ADC_CLK_MAX MHZ(14) +#endif /** * @brief Allocate locks for all three available ADC devices @@ -122,7 +124,7 @@ int adc_init(adc_t line) } /* set clock prescaler to get the maximal possible ADC clock value */ for (clk_div = 2; clk_div < 8; clk_div += 2) { - if ((CLOCK_CORECLOCK / clk_div) <= MAX_ADC_SPEED) { + if ((periph_apb_clk(APB2) / clk_div) <= ADC_CLK_MAX) { break; } } diff --git a/cpu/stm32/periph/adc_f1.c b/cpu/stm32/periph/adc_f1.c index bb1e1aa2b8da..5753eeda9092 100644 --- a/cpu/stm32/periph/adc_f1.c +++ b/cpu/stm32/periph/adc_f1.c @@ -28,7 +28,9 @@ /** * @brief Maximum allowed ADC clock speed */ -#define MAX_ADC_SPEED MHZ(14) +#ifndef ADC_CLK_MAX +#define ADC_CLK_MAX MHZ(14) +#endif /** * @brief Allocate locks for all three available ADC devices @@ -93,7 +95,7 @@ int adc_init(adc_t line) } /* set clock prescaler to get the maximal possible ADC clock value */ for (clk_div = 2; clk_div < 8; clk_div += 2) { - if ((periph_apb_clk(APB2) / clk_div) <= MAX_ADC_SPEED) { + if ((periph_apb_clk(APB2) / clk_div) <= ADC_CLK_MAX) { break; } } diff --git a/cpu/stm32/periph/adc_f2.c b/cpu/stm32/periph/adc_f2.c index 8f75c5e3a9cd..dd8b6b1f5c10 100644 --- a/cpu/stm32/periph/adc_f2.c +++ b/cpu/stm32/periph/adc_f2.c @@ -29,7 +29,9 @@ /** * @brief Maximum allowed ADC clock speed */ -#define MAX_ADC_SPEED MHZ(12) +#ifndef ADC_CLK_MAX +#define ADC_CLK_MAX MHZ(12) +#endif /** * @brief Default VBAT undefined value @@ -86,7 +88,7 @@ int adc_init(adc_t line) } /* set clock prescaler to get the maximal possible ADC clock value */ for (clk_div = 2; clk_div < 8; clk_div += 2) { - if ((periph_apb_clk(APB2) / clk_div) <= MAX_ADC_SPEED) { + if ((periph_apb_clk(APB2) / clk_div) <= ADC_CLK_MAX) { break; } } diff --git a/cpu/stm32/periph/adc_f4_f7.c b/cpu/stm32/periph/adc_f4_f7.c index b52fc401c691..ef707b3b4767 100644 --- a/cpu/stm32/periph/adc_f4_f7.c +++ b/cpu/stm32/periph/adc_f4_f7.c @@ -29,7 +29,9 @@ /** * @brief Maximum allowed ADC clock speed */ -#define MAX_ADC_SPEED MHZ(12) +#ifndef ADC_CLK_MAX +#define ADC_CLK_MAX MHZ(12) +#endif /** * @brief Maximum sampling time for each channel (480 cycles) @@ -95,7 +97,7 @@ int adc_init(adc_t line) dev(line)->CR2 = ADC_CR2_ADON; /* set clock prescaler to get the maximal possible ADC clock value */ for (clk_div = 2; clk_div < 8; clk_div += 2) { - if ((periph_apb_clk(APB2) / clk_div) <= MAX_ADC_SPEED) { + if ((periph_apb_clk(APB2) / clk_div) <= ADC_CLK_MAX) { break; } } From 410e55d912e2b79037ae839b8c34f767c8f457b2 Mon Sep 17 00:00:00 2001 From: Joshua DeWeese Date: Fri, 10 May 2024 21:40:47 -0400 Subject: [PATCH 2/3] cpu/{gd32v,stm32}/periph/adc: ensure max ADC speed is honored This patch ensures that the ADC's max clock speed is not exceded. --- cpu/gd32v/periph/adc.c | 2 ++ cpu/stm32/periph/adc_f1.c | 2 ++ cpu/stm32/periph/adc_f2.c | 2 ++ cpu/stm32/periph/adc_f4_f7.c | 2 ++ 4 files changed, 8 insertions(+) diff --git a/cpu/gd32v/periph/adc.c b/cpu/gd32v/periph/adc.c index a1868bf72fa9..88b15a1c32e7 100644 --- a/cpu/gd32v/periph/adc.c +++ b/cpu/gd32v/periph/adc.c @@ -22,6 +22,7 @@ * @} */ +#include "compiler_hints.h" #include "cpu.h" #include "macros/units.h" #include "mutex.h" @@ -128,6 +129,7 @@ int adc_init(adc_t line) break; } } + assume((periph_apb_clk(APB2) / clk_div) <= ADC_CLK_MAX); RCU->CFG0 &= ~(RCU_CFG0_ADCPSC_2_Msk); RCU->CFG0 |= ((clk_div / 2) - 1) << RCU_CFG0_ADCPSC_2_Pos; diff --git a/cpu/stm32/periph/adc_f1.c b/cpu/stm32/periph/adc_f1.c index 5753eeda9092..4382f72aee7a 100644 --- a/cpu/stm32/periph/adc_f1.c +++ b/cpu/stm32/periph/adc_f1.c @@ -20,6 +20,7 @@ * @} */ +#include "compiler_hints.h" #include "cpu.h" #include "mutex.h" #include "periph/adc.h" @@ -99,6 +100,7 @@ int adc_init(adc_t line) break; } } + assume((periph_apb_clk(APB2) / clk_div) <= ADC_CLK_MAX); RCC->CFGR &= ~(RCC_CFGR_ADCPRE); RCC->CFGR |= ((clk_div / 2) - 1) << 14; diff --git a/cpu/stm32/periph/adc_f2.c b/cpu/stm32/periph/adc_f2.c index dd8b6b1f5c10..48a7bb1b6e52 100644 --- a/cpu/stm32/periph/adc_f2.c +++ b/cpu/stm32/periph/adc_f2.c @@ -20,6 +20,7 @@ * @} */ +#include "compiler_hints.h" #include "cpu.h" #include "mutex.h" #include "periph/adc.h" @@ -92,6 +93,7 @@ int adc_init(adc_t line) break; } } + assume((periph_apb_clk(APB2) / clk_div) <= ADC_CLK_MAX); ADC->CCR = ((clk_div / 2) - 1) << 16; /* enable the ADC module */ diff --git a/cpu/stm32/periph/adc_f4_f7.c b/cpu/stm32/periph/adc_f4_f7.c index ef707b3b4767..e946c1e2a760 100644 --- a/cpu/stm32/periph/adc_f4_f7.c +++ b/cpu/stm32/periph/adc_f4_f7.c @@ -19,6 +19,7 @@ * @} */ +#include "compiler_hints.h" #include "cpu.h" #include "irq.h" #include "mutex.h" @@ -101,6 +102,7 @@ int adc_init(adc_t line) break; } } + assume((periph_apb_clk(APB2) / clk_div) <= ADC_CLK_MAX); ADC->CCR = ((clk_div / 2) - 1) << 16; /* set sampling time to the maximum */ unsigned irq_state = irq_disable(); From 4ed36bf87137a2f07bcc9cde21803dd9ce6f70e6 Mon Sep 17 00:00:00 2001 From: Joshua DeWeese Date: Fri, 19 May 2023 13:19:03 -0400 Subject: [PATCH 3/3] boards/nucleo-f767zi: increase ADC clock speed This patch increases the board's ADC clock speed to the MCU's maximum speed. --- boards/nucleo-f767zi/include/periph_conf.h | 1 + 1 file changed, 1 insertion(+) diff --git a/boards/nucleo-f767zi/include/periph_conf.h b/boards/nucleo-f767zi/include/periph_conf.h index d6608c3240cb..8fc36657fa53 100644 --- a/boards/nucleo-f767zi/include/periph_conf.h +++ b/boards/nucleo-f767zi/include/periph_conf.h @@ -208,6 +208,7 @@ static const adc_conf_t adc_config[] = { }; #define VBAT_ADC ADC_LINE(6) /**< VBAT ADC line */ +#define ADC_CLK_MAX MHZ(36) /**< Use a faster than default ADC clock */ #define ADC_NUMOF ARRAY_SIZE(adc_config) /** @} */